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CLC1006ISO8X 参数 Datasheet PDF下载

CLC1006ISO8X图片预览
型号: CLC1006ISO8X
PDF下载: 下载PDF文件 查看货源
内容描述: 单, 500MHz的电压反馈放大器 [Single, 500MHz Voltage Feedback Amplifier]
分类和应用: 放大器
文件页数/大小: 16 页 / 1918 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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Data Sheet
Application Information
Basic Operation
Figures 1 and 2 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
+V
s
6.8μF
perature, the package thermal resistance value Theta
JA
JA
) is used along with the total die power dissipation.
T
Junction
= T
Ambient
+ (Ө
JA
× P
D
)
Where T
Ambient
is the temperature of the working environment.
In order to determine P
D
, the power dissipated in the load
needs to be subtracted from the total power delivered by
the supplies.
P
D
= P
supply
- P
load
Supply power is calculated by the standard power equa-
tion.
Output
C
omlinear
CLC1006
Single, 500MHz Voltage Feedback Amplifier
Input
+
-
0.1μF
P
supply
= V
supply
× I
RMS supply
V
supply
= V
S+
- V
S-
Power delivered to a purely resistive load is:
P
load
= ((V
LOAD
)
RMS
2
)/Rload
eff
The effective load resistor (Rload
eff
) will need to include
the effect of the feedback network. For instance,
Rload
eff
in figure 3 would be calculated as:
0.1μF
R
g
-V
s
6.8μF
R
L
R
f
G = 1 + (R
f
/R
g
)
Figure 1. Typical Non-Inverting Gain Circuit
+V
s
6.8μF
R
L
|| (R
f
+ R
g
)
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Here, P
D
can be found from
P
D
= P
Quiescent
+ P
Dynamic
- P
Load
G = - (R
f
/R
g
)
For optimum input offset
voltage set R
1
= R
f
|| R
g
R
1
Input
R
g
+
-
0.1μF
Output
0.1μF
6.8μF
-V
s
R
L
R
f
Figure 2. Typical Inverting Gain Circuit
Quiescent power can be derived from the specified I
S
val-
ues along with known supply voltage, V
Supply
. Load power
can be calculated as above with the desired signal ampli-
tudes using:
(V
LOAD
)
RMS
= V
PEAK
/ √2
( I
LOAD
)
RMS
= ( V
LOAD
)
RMS
/ Rload
eff
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
P
DYNAMIC
= (V
S+
- V
LOAD
)
RMS
× ( I
LOAD
)
RMS
Assuming the load is referenced in the middle of the pow-
er rails or V
supply
/2.
Figure 3 shows the maximum safe power dissipation in
the package vs. the ambient temperature for the pack-
ages available.
Rev 1B
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 1000 ohm load condition. However, ap-
plications with low impedance, DC coupled loads should
be analyzed to ensure that maximum allowed junction
temperature is not exceeded. Guidelines listed below can
be used to verify that the particular application will not
cause the device to operate beyond it’s intended operat-
ing range.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction tem-
©2007-2008 CADEKA Microcircuits LLC
www.cadeka.com
12