Data Sheet
Functional Description
Within the CDK3404 are three identical 8-bit D/A converters,
each with a current source output. External loads are
required to convert the current to voltage outputs. Data
inputs RGB7-0 are overridden by the BLANK input. SYNC
= H activates, sync current from I
OS
for sync-on-green
video signals.
V
DDA
I
OS
SYNC
G7-0
V
DDA
BLANK gates the D/A inputs. If BLANK = HIGH, the D/A
inputs control the output currents to be added to the out-
put blanking level. If BLANK = Low, data inputs and the
pedestal are disabled.
CDK3404
8-bit, 180MSPS, Triple Video DACs
Data: 660mV max.
Pedestal: 54mV
Sync: 286mV
V
DDA
B7-0
Figure 3. Normal Output Levels
Sync Pulse Input - SYNC
Bringing SYNC LOW, disables a current source which su-
perimposes a sync pulse on the IO
G
output. SYNC and
pixel data are registered on the rising edge of CLK. SYNC
does not override any other data and should be used only
during the blanking interval. If sync pulses are not re-
quired, SYNC should be connected to GND.
V
DDA
R7-0
Figure 2. CDK3404 Current Source Structure
Blanking Input - BLANK
When BLANK is LOW, pixel data inputs are ignored and
the D/A converter outputs are driven to the blanking level.
BLANK is registered on the rising edge of CLK.
Digital Inputs
Incoming GBR data is regsitered on the rising edge of the
clock input, CLK. Analog outputs follow the rising edge of
CLK after a delay, t
DO
.
Clock Input - CLK
Pixel data is registered on the rising edge of CLK. CLK
should be driven by a dedicated buffer to avoid reflection
induced jitter, overshoot, and undershoot.
Pixel Data Inputs - R7-0, B7-0, G7-0
RGB digital inputs are registered on the rising edge of CLK.
Rev 3A
D/A Outputs
Each D/A output is a current source from the V
DDA
supply.
Expressed in current units, the GBR transformation from
data to current is as follows:
G = G7-0 & BLANK + SYNC * 112
B = B7-0 & BLANK
R = R7-0 & BLANK
Typical LSB current step is 73.2µA. To obtain a voltage
output, a resistor must be connected to ground. Output
voltage depends upon this external resistor, the reference
voltage, and the value of the gain-setting resistor con-
nected between R
REF
and GND.
To implement a doubly-terminated 75Ω transmission line,
a shunt 75Ω resistor should be placed adjacent to the
analog output pin. With a terminated 75Ω line connected
to the analog output, the load on the CDK3404 current
source is 37.5Ω.
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SYNC and BLANK
SYNC and BLANK inputs control the output level (Figure
3 and Table 1, on the previous page) of the D/A convert-
ers during CRT retrace intervals. BLANK forces the D/A
outputs to the blanking level while SYNC = L turns off a
current source, I
OS
, that is connected to the green D/A
converter. SYNC = H adds a 112/256 fraction of full-scale
current to the green output. SYNC = L extinguishes the
sync current during the sync tip.
©2009 CADEKA Microcircuits LLC
7
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