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CDK3402CTQ48 参数 Datasheet PDF下载

CDK3402CTQ48图片预览
型号: CDK3402CTQ48
PDF下载: 下载PDF文件 查看货源
内容描述: 8位, 100 / 150MSPS ,三路视频数模转换器 [8-bit, 100/150MSPS, Triple Video DACs]
分类和应用: 转换器数模转换器
文件页数/大小: 11 页 / 964 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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Data Sheet
Electrical Characteristics
(T
A
= 25°C, V
DD
= +5V, V
REF
= 1.235V, R
L
= 37.5Ω, R
REF
= 540Ω; unless otherwise noted)
symbol
I
DD
PD
R
O
C
O
I
IH
I
IL
I
REF
V
REF
V
OC
C
DI
parameter
Power Supply Current
(1)
Total Power Dissipation
Output Resistance
Output Capacitance
Input Current, HIGH
Input Current, LOW
V
REF
Input Bias Current
Reference Voltage Output
Output Compliance
Digital Input Capacitance
(1)
conditions
V
DD
= 5.25V, T
A
= 0°C
V
DD
= 5.25V, T
A
= 0°C
Min
typ
Max
125
655
units
mA
mW
CDK3402/CDK3403
8-bit, 100/150MSPS, Triple Video DACs
100
I
OUT
= 0mA
V
DD
= 5.25V, V
IN
= 2.4V
V
DD
= 5.25V, V
IN
= 0.4V
0
1.235
Referred to V
DD
-0.4
0
4
+1.5
10
30
-5
5
±100
pF
µA
µA
µA
V
V
pF
notes:
1. 100% tested at 25°C.
2. Parameter is guaranteed (but not tested) by design and characterization data.
Switching Characteristics
(T
A
= 25°C, V
DD
= +5V, V
REF
= 1.235V, R
L
= 37.5Ω, R
REF
= 590Ω; unless otherwise noted)
symbol
t
D
t
SKEW
t
R
t
F
notes:
1. 100% production tested at +25°C.
2. Parameter is guaranteed (but not tested) by design and characterization data.
parameter
Clock to Output Delay
Output Skew
Output Risetime
Output Falltime
conditions
V
DD
= 4.75V, T
A
= 0°C
10% to 90% of Full Scale
90% to 10% of Full Scale
Min
typ
10
1
Max
15
2
3
3
units
ns
ns
ns
ns
System Performance Characteristics
(T
A
= 25°C, V
DD
= +5V, V
REF
= 1.235V, R
L
= 37.5Ω, R
REF
= 590Ω; unless otherwise noted)
symbol
INL
DNL
E
DM
PSRR
notes:
1. 100% production tested at +25°C.
2. Parameter is guaranteed (but not tested) by design and characterization data.
parameter
Integral Linearity Error
Differential Linearity Error
DAC to DAC Matching
Power Supply Rejection Ratio
conditions
Min
typ
±0.2
±0.2
5
Max
±0.3
±0.3
10
0.05
units
%/FS
%/FS
%
%/%
Rev 1B
©2008 CADEKA Microcircuits LLC
www.cadeka.com
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