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CDK1308DILP40 参数 Datasheet PDF下载

CDK1308DILP40图片预览
型号: CDK1308DILP40
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗, 20/40/ 65 / 80MSPS , 10位模拟至数字转换器(ADC ) [Ultra Low Power, 20/40/65/80MSPS, 10-bit Analog-to-Digital Converters (ADCs)]
分类和应用: 转换器
文件页数/大小: 14 页 / 1060 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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ADVANCE Data Sheet  
Electrical Characteristics  
(AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 20/40/65/80MSPS clock, 50% clock duty cycle,  
-1dBFS 8MHz input signal, unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
DC Accuracy  
No Missing Codes  
Guaranteed  
TBD  
Offset Error  
Midscale offset  
mV  
%FS  
LSB  
LSB  
V
Gain Error  
Full scale range deviation from typical  
-6  
6
DNL  
Differential Non-Linearity  
Integral Non-Linearity  
Common Mode Voltage Output  
-0.3  
-0.6  
0.3  
0.6  
INL  
VCMO  
VAVDD/2  
Analog Input  
VCMI  
Input Common Mode  
Analog input common mode voltage  
Differential input voltage range  
Differential input capacitance  
Input bandwidth, full power  
VCM -0.1  
500  
VCM +0.1  
V
2.0  
1.8  
Vpp  
pF  
VFSR  
Full Scale Range  
Input Capacitance  
Bandwidth  
MHz  
Power Supply  
Supply voltage to all 1.8V domain pins.  
See Pin Configuration and Description  
1.7  
1.7  
1.8  
2.5  
2.0  
3.6  
V
V
AVDD,  
DVDD  
Core Supply Voltage  
I/O Supply Voltage  
Output driver supply voltage (OVDD).  
Must be higher than or equal to Core Supply  
OVDD  
Voltage (VOVDD ≥ VOCVDD  
)
©2008 CADEKA Microcircuits LLC  
www.cadeka.com  
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