ADVANCE
Data Sheet
Pin Assignments
(Continued)
Pin No.
23
24
27
28
29
30
31
32
33
34
35
38, 39
Pin Name
D_4
ORNG
CLK_EXT
D_5
D_6
D_7
D_8
D_9
D_10
D_11
D_12
CM_EXTBC_1,
CM_EXTBC_0
SLP_N
Description
Output Data
Out of Range flag. High when input signal is out of range
CDK1307
Ultra Low Power, 20/40/65/80MSPS, 12/13-bit ADCs
Output clock signal for data synchronization. CMOS levels
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data (MSB for 1V
pp
full scale range, see Reference Voltages section)
Output Data (MSB for 2V
pp
full scale range)
Bias control bits for the buffer driving pin CM_EXT
00: OFF
10: 500μA
10: 50μA
11: 1mA
40
Sleep Mode when low
Rev 0.1
©2008 CADEKA Microcircuits LLC
www.cadeka.com
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