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CDK1303AEMQ80_Q 参数 Datasheet PDF下载

CDK1303AEMQ80_Q图片预览
型号: CDK1303AEMQ80_Q
PDF下载: 下载PDF文件 查看货源
内容描述: 8位, 1 GSPS时,Flash A / D转换器 [8-bit, 1 GSPS, Flash A/D Converter]
分类和应用: 转换器
文件页数/大小: 9 页 / 1219 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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Data Sheet
Electrical Characteristics
(T
J
= T
C
= T
A
= +25°C , V
EE
= -5.2V, V
RB
= -2.0V, V
RM
= -1.0V, V
RT
= 0.00V, ƒ
CLK
= 1GHz, Duty Cycle=50%,
unless otherwise specified)
cDK1303a
symbol
parameter
Resolution
cDK1303B
Max
Min
typ
8
+0.95
+1.0
-0.95
-1.5
+1.5
+1.5
Guaranteed
V
RT
V
RB
0.75
15
15
900
500
+30
+30
-30
-30
5
2
60
80
30
1
+30
+30
V
RT
2.0
V
mA
pF
MHz
MHz
mV
mV
V/ns
μA
Ω
MHz
GHz
2
250
1.9
2.25
0.9
1.25
43
41
-42
-34
43
35
40
33
1.4
1.75
1.9
2.25
ps
ps
ns
ns
dB
dB
dBc
dBc
dB
dB
dB
dB
conditions
Min
typ
8
Max
units
CDK1303
8-bit, 1 GSPS, Flash A/D Converter
bits
LSB
LSB
DC Performance
DLE
ILE
Differential Linearity Error
(1)
Integral Linearity Error
No Missing Codes
(1)
ƒ
clk
= 100MHz
ƒ
clk
= 100MHz
-0.85
-1.0
Guaranteed
V
RB
Analog Input
Input Voltage Range
(1)
Input Bias Current
(1)
Input Resistance
Input Capacitance
Input Bandwidth
Offset Error
(2)
Offset Error
(2)
Input Slew Rate
Clock Synchronous Input Currents
Over Full Input Range
Small Signal
Large Signal
V
RT
V
RB
-30
-30
5
2
60
80
30
1
2
250
0.9
(2)
V
IN
= 0V
0.75
15
15
900
500
2.0
Reference Input
Ladder Resistance
(1)
Reference Bandwidth
Timing Characteristics
Maximum Sample Rate
(1)
Aperture Jitter
Acquisition Time
CLK to Data Delay
(2)
CLK to Data Ready Delay
1.25
ƒ
IN
= 50MHz
(1)
ƒ
IN
= 250MHz
(1)
REV 1A
1.4
1.75
Dynamic Performance
SNR
THD
SFDR
SINAD
notes:
1. 100% production tested at +25°C.
2. Parameter is guaranteed (but not tested) by design and characterization data.
3. Typical Thermal Impedance:
θ
JC
= +4°C/W.
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious Free Dynamic Range
Signal-to-Noise and Distortion
45
43
-44
-36
47
39
42
35
ƒ
IN
= 50MHz
(1)
ƒ
IN
= 250MHz
(1)
ƒ
IN
= 50MHz
(1)
ƒ
IN
= 250MHz
(1)
ƒ
IN
= 50MHz
(1)
ƒ
IN
= 250MHz
(1)
©2008 CADEKA Microcircuits LLC
www.cadeka.com
4