欢迎访问ic37.com |
会员登录 免费注册
发布采购

CDK1301 参数 Datasheet PDF下载

CDK1301图片预览
型号: CDK1301
PDF下载: 下载PDF文件 查看货源
内容描述: 8位, 250 MSPS A / D转换器,解复用输出REV 1A [8-bit, 250 MSPS A/D Converter with Demuxed Outputs REV 1A]
分类和应用: 转换器
文件页数/大小: 12 页 / 1980 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
 浏览型号CDK1301的Datasheet PDF文件第1页浏览型号CDK1301的Datasheet PDF文件第2页浏览型号CDK1301的Datasheet PDF文件第3页浏览型号CDK1301的Datasheet PDF文件第4页浏览型号CDK1301的Datasheet PDF文件第6页浏览型号CDK1301的Datasheet PDF文件第7页浏览型号CDK1301的Datasheet PDF文件第8页浏览型号CDK1301的Datasheet PDF文件第9页  
Data Sheet
Electrical Characteristics
(T
A
= T
Min
to T
Max
, AV
CC
= +5V, OV
DD
= +5V, ƒ
clk
= 250MHz, 50% duty cycle,
ƒ
IN
= 70MHz, dual channel mode; unless otherwise noted)
symbol
AV
cc
OV
DD
AI
cc
OI
DD
parameter
Analog Voltage Supply
(2)
Digital Voltage Supply
(2)
Current
(1)
Current Power-down
(1)
Current
Single Mode
Parallel Mode
Interleave Mode
Power Dissipation
(1)
conditions
Min
4.75
2.75
typ
5.0
85
Max
5.25
5.25
110
5.5
units
Power Supply Requirements
CDK1301
8-bit, 250 MSPS A/D Converter with Demuxed Outputs
V
V
mA
mA
mA
mA
mA
+25°C
OV
DD
= 3.0V, 10pF load
4.8
35
55
55
425
2.44
2.5
84
1.07
47.5
400
1.4
0
550
2.56
mW
V
ppm/°C
mV/V
mV
pp
Common Mode Reference Output
Voltage
(1)
Voltage Tempcp
Open Impedance
PSRR
V
DIFF
V
IHD
V
ILD
V
CMD
V
IH
V
IL
I
IH
I
IL
Power Supply Rejection Ratio
Differental Signal Amplitude
(2)
Differental High Input Voltage
(2)
Differental Low Input Voltage
(2)
Differental Common Mode Input
(2)
I
OUT
= ±50µA
Clock and Reset Inputs (Differential and Single-Ended)
AV
cc
3.9
4.1
1.2
43
43
+100
+100
AV
cc
1.0
0.5
50
+100
+100
V
V
V
V
V
µA
µA
V
V
µA
µA
V
0.2
3.3/3.0
2.3/1.9
1.2/1.0
0.7/0.6
V
ns
ns
ns
ns
1.2
1.8
0
V
ID
= 1.5V
V
ID
= 1.5V
-100
-100
2.0
0
Single-Ended High Input Voltage
(1)
Single-Ended Low Input Voltage
(2)
High Input Current
(1)
Low Input Current
(1)
High Input Voltage
(2)
Low Input Voltage
(2)
Max Input Current Low
(1)
Power Down and Mode Control Inputs (Single-Ended)
-100
-100
I
OH
= -0.5mA
I
OL
= +1.6mA
OV
DD
= 3V, 10pF load
OV
DD
= 5V, 10pF load
OV
DD
= 3V, 10pF load
OV
DD
= 5V, 10pF load
OV
DD-2.0
Max Input Current High <4.0V
(1)
Digital Outputs
Logic “1“ Voltage
(1)
Logic “0“ Voltage
(1)
T
R
/T
F
Data
T
R
/T
F
DCLK
notes:
1. 100% production tested at +25°C.
2. Parameter is guaranteed (but not tested) by design and characterization data.
REV 1A
©2008 CADEKA Microcircuits LLC
www.cadeka.com
5