TISP8200M & TISP8201M
Description (Continued)
Negative overvoltages are initially clipped close to the SLIC negative supply by emitter follower action of the NPN buffer transistor. If sufficient
clipping current flows, the SCR will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the high holding
current of the SCR prevents d.c. latchup.
The TISP8201M has an array of two buffered N-gate SCRs with a common cathode connection. Each SCR anode and gate has a separate
terminal connection. The PNP buffer transistors reduce the gate supply current.
In use, the anodes of the TISP8201M SCRs are connected to the two conductors of the POTS line (see applications information). The gates
are connected to the appropriate positive voltage battery feed of the SLIC driving that line pair. This ensures that the TISP8201M protection
voltage tracks the SLIC positive supply voltage. The cathode of the TISP8201M is connected to the SLIC common.
Positive overvoltages are initially clipped close to the SLIC positive supply by emitter follower action of the PNP buffer transistor. If sufficient
clipping current flows, the SCR will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the SLIC pulls
the conductor voltage down to its normal negative value and this commutates the conducting SCR into a reverse biassed condition.
Absolute Maximum Ratings for TISP8200M, T A = 25
°C
(Unless Otherwise Noted)
Rating
Repetitive peak off-state voltage, TISP8200M V
GK
= 0
Repetitive peak reverse voltage, V
GA
= -70 V
Non-repetitive peak on-state pulse current, (see Notes 1 and 2)
10/1000
µs
(Telcordia/Bellcore GR-1089-CORE, Issue 2, February 1999, Section 4)
5/310
µs
(ITU-T K.20, K.21& K.45, K.44 open-circuit voltage wave shape 10/700
µs)
2/10
µs
(Telcordia/Bellcore GR-1089-CORE, Issue 2, February 1999, Section 4)
Non-repetitive peak on-state current, 50/60 Hz (see Notes 1, 2 and 3)
100 ms
1s
5s
300 s
900 s
Non-repetitive peak gate current, 2/10
µs
pulse, cathode commoned (see Note 1)
Junction temperature
Storage temperature range
-11
-6.5
-3.4
-1.4
-1.3
10
-55 to +150
-65 to +150
I
TSP
-45
-70
-210
A
Symbol
V
DRM
V
RRM
Value
-120
120
Unit
V
V
I
TSM
A
I
GSM
T
J
T
stg
A
°C
°C
NOTES: 1. Initially, the protector must be in thermal equilibrium with -40
°C
≤
T
J
≤
85
°C.
The surge may be repeated after the device returns
to its initial conditions.
2. These non-repetitive rated currents are peak values. The rated current values may be applied to any cathode-anode terminal pair.
Above 85
°C,
derate linearly to zero at 150
°C
lead temperature.
3. These non-repetitive rated terminal currents are for the TISP8200M and TISP8201M together. Device (A) terminal positive current
values are conducted by the TISP8201M and (K) terminal negative current values by the TISP8200M.
MAY 1998 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
BOURNS [ BOURNS ELECTRONIC SOLUTIONS ]
