4.6 Advanced Chipset Setup
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that the
data has been lost while using your system.
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Item Help
DRAM Timing Selectable
CAS Latency Time
[By SPD]
[1.5]
Menu Level
X
Active to Precharge Delay
DRAM RAS# to CAS# Delay
DRAM RAS# Precharge
Turbo Mode
Memory Frequency For
System BIOS Cacheable
Video BIOS Cacheable
Memory Hole At 15M-16M
Delayed Transaction
[7]
[3]
[3]
[Disabled]
[Auto]
[Enabled]
[Enabled]
[Disabled]
[Enabled]
[16Min]
[64]
Delay Prior to Thermal
AGP Aperture Size (MB)
** ON-chip VGA Setting **
On-chip VGA
On-chip Frame Buffer size
Boot Display
Panel Scaling
Panel Number
[Enabled]
[8MB]
[CRT]
[Auto]
[1]
ꢃꢄꢅꢆ: Select Item + / - /PU/PD: Value
F10: Save ESC: Quit F1: General Help
F5: Previous Values
F6: Fail-Safe Defaults F7: Optimized Defaults
NOTE: Panel Number: 1 (Default Panel 1: TOSHIBA LTM10C348F)
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