BMA253
Data sheet
Page 17
The sleep time for lower-power mode 1 and 2 is set by the (0x11) sleep_dur bits as shown in
the following table:
Table 3: Sleep phase duration settings
Sleep Phase
(0x11)
Duration
sleep_dur
tsleep
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
0.5ms
0.5ms
0.5ms
0.5ms
0.5ms
0.5ms
1ms
2ms
4ms
6ms
10ms
25ms
50ms
100ms
500ms
1s
The current consumption of the BMA253 in low-power mode 1 (IDDlp1) and low-power mode 2
(IDDlp2) can be estimated with the following formulae:
tsleep IDDsum tactive IDD
IDDlp1
.
tsleep tactive
tsleep IDDsbm tactive IDD
IDDlp2
tsleep tactive
When estimating the length of the wake-up phase tactive, the corresponding typical wake-up time,
tw,up1 or tw,up2 and tut (given in Table 4) have to be considered:
If bandwidth is >=31.25 Hz:
tactive = tut + tw,up1 - 0.9 ms (or tactive = tut + tw,up2 - 0.9 ms)
else:
tactive = 4 tut + tw,up1 - 0.9 ms (or tactive = 4 tut + tw,up2 - 0.9 ms)
During the wake-up phase all analog modules are held powered-up, while during the sleep
phase most analog modules are powered down. Consequently, a wake-up time of at least tw,up1
(tw,up2) is needed to settle the analog modules so that reliable acceleration data are generated.
BST-BMA253-DS000-01 | Revision 1.0 | August 2015
Bosch Sensortec
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Note: Specifications within this document are subject to change without notice.
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