上海贝岭股½有限公司
上海贝岭股½有限公司
股½
Shanghai Belling Co., Ltd.
SPECIFICATION
BL22P64 SPECIFICATION
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R
R
XXXX XXXX
---- --XX
ADDATAH
ADDATAL
5.3.1 T0CNT(TIMER 0 Counter Register)
)
(
T0CNT is a 8-bit counter register of Timer 0. T0CNT is read only.
NOTE:
●
- :
Not used;
X:
Undefined;
R: Determined by OPBIT[2]
5.3.2 T0DATA(TIMER 0 Data Register)
(
)
T0DATA is a 8-bit Data Register to set match data of Timer 0. When the counter value is identical to
the value written to T0DATA, generates a Timer 0 match interrupt.
5.3.3 T0CON(TIMER 0 Control Register)
(
)
Timer 0 Control Register, is used to select the Timer 0 operating mode.
.7-.6 T0PS[1:0] Timer 0 input clock selection
00: Fsys/4096
01: Fsys/256
10: Fsys/8
11: Fsys
(
NOTE
:
Fsys is system frequency which is half of oscillator’s
)
.5-.4 Not used
.3 T0CLR Timer 0 counter clear bit. Value is “0” when read.
0: No effect
1: Clear the Timer 0 counter (when write) 0
.2 Not used
.1 T0E Timer 0 interrupt enable bit
0: Disable T0 interrupt
1: Enable T0 interrupt
.0 T0F Timer 0 interrupt pending bit
0: No T0 interrupt pending (when read)
0: Clear T0 pending bit (when write)
1: Interrupt is pending (when read)
1: No effect (when write)
5.3.4 MCR(Miscellaneous Control Register)
(
)
MCR is used to control LVR. The reset value is determined by OPBIT[2]。
.7-.1 Not used
.0 LVRE LVR enable bit
0: LVR disable
1: LVR enable
5.3.5 BTCON(Basic Timer Control Register)
(
)
BTCON, is used to select the input clock frequency, to clear the basic timer counter and frequency
dividers, and to control the watchdog timer.
.7-.4 WDTE[3:0] Watchdog timer enable bits
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