Preliminary Datasheet
2A DDR TERMINATION REGULATOR
General Description
The AP2302L linear regulator is designed to meet the
JEDEC specification SSTL-2 and SSTL-18 for termi-
nation of DDR-SDRAM. The regulator can sink or
source up to 2A current continuously, providing
enough current for most DDR applications. V
OUT
is
designed to track the V
REF
voltage within a
±
20mV
tolerance over the entire current range while prevent-
ing shooting through on the output stage. On-chip ther-
mal limiting provides protection against a combination
of high current and ambient temperature which would
create an excessive junction temperature.
The AP2302L, used in conjunction with series termi-
nation resistors, provides an excellent voltage source
for active termination schemes of high speed transmis-
sion lines as those seen in high speed memory buses
and distributed backplane designs.
The AP2302L is available in SOIC-8 and TO-252-5
packages.
AP2302L
Features
·
·
·
·
·
Support Both DDR I (1.25V
TT
) and DDR II
(0.9V
TT
) Requirements
Source and Sink Current up to 2A
High Accuracy Output Voltage at Full-load
Adjustable V
OUT
by External Resistors
Shutdown for Standby or Suspend Mode
Operation with High-impedance Output
Applications
·
·
·
DDR-SDRAM Termination
DDR-II Termination
SSTL-2 Termination
SOIC-8
TO-252-5
Figure 1. Package Types of AP2302L
Nov. 2005 Rev. 1. 1
1
BCD Semiconductor Manufacturing Limited
BCDSEMI [ BCD SEMICONDUCTOR MANUFACTURING LIMITED ]
