PIN CONFIGURATION
Top View
DIP
Top View
SOIC
1
2
3
4
5
6
7
8
Zero Adjust
Zero Adjust
–In
16 Zero Adjust
15 Bandwidth
14 B Control
13 IREF2
1
2
3
4
5
6
7
Zero Adjust
Zero Adjust
–In
14 Zero Adjust
13 Bandwidth
12 B Control
SOL-16
Surface-Mount
+In
DIP
+In
11
10 IREF1
IREF2
Span
12 IREF1
Span
Span
11
10 +VCC
NC
E
Span
9
8
E
Out
Out
+VCC
NC
9
ABSOLUTE MAXIMUM RATINGS
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Power Supply, +VCC ........................................................................... 40V
Input Voltage, e1 or e2 ........................................................ ≥VOUT, ≤+VCC
Storage Temperature Range, Ceramic ........................ –55°C to +165°C
Plastic ............. –55°C to +125°C
Lead Temperature (soldering 10s) G, P ...................................... +300°C
(wave soldering, 3s) U .......................... +260°C
Output Short-Circuit Duration ........................... Continuous +VCC to IOUT
Junction Temperature ................................................................... +165°C
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING
NUMBER(1)
TEMPERATURE
RANGE
PRODUCT
PACKAGE
XTR101AG
XTR101BG
XTR101AP
XTR101AU
14-Pin Ceramic DIP
14-Pin Ceramic DIP
14-Pin Plastic DIP
16-Lead SOIC
169
169
010
211
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
®
3
XTR101
BB [ BURR-BROWN CORPORATION ]
