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SBAS405 – MARCH 2007
TIMING INFORMATION
SDA
t
SU, DAT
t
LOW
t
HD, DAT
t
SU, STA
t
HD, STA
t
SU, STO
t
BUF
SCL
t
HD, STA
t
R
START
CONDITION
t
HIGH
t
F
REPEATED
START
CONDITION
STOP
CONDITION
START
CONDITION
Figure 1. Detailed I/O Timing
TIMING REQUIREMENTS: I
2
C Standard Mode (SCL = 100kHz)
All specifications typical at –40°C to +85°C, V
DD
= 1.6V, unless otherwise noted.
2-WIRE STANDARD MODE PARAMETERS
SCL clock frequency
Bus free time between a STOP and START condition
Hold time (repeated) START condition
Low period of SCL clock
High period of the SCL clock
Setup time for a repeated START condition
Data hold time
Data setup time
Rise time for both SDA and SCL clock signals (receiving)
Fall time for both SDA and SCL clock signals (receiving)
Fall time for both SDA and SCL clock signals (transmitting)
Setup time for STOP condition
Capacitive load for each bus line
Cycle time
8 bits
12 bits
8 bits
12 bits
8 bits
12 bits
f
SCL
t
BUF
t
HD, STA
t
LOW
t
HIGH
t
SU, STA
t
HD, DAT
t
SU, DAT
t
R
t
F
t
OF
t
SU, STO
C
b
C
b
= total capacitance of one bus line in pF
40 SCL + 127 CCLK, V
DD
= 1.8V
49 SCL + 148 CCLK, V
DD
= 1.8V
V
DD
= 1.8V
V
DD
= 1.8V
V
DD
= 1.8V
V
DD
= 1.8V
434.7
570.9
2.3
1.75
16.1
12.26
C
b
= total bus capacitance
C
b
= total bus capacitance
C
b
= total bus capacitance
4.0
400
TEST CONDITIONS
MIN
0
4.7
4.0
4.7
4.0
4.7
0
250
1000
300
250
3.45
TYP
MAX
100
UNIT
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
µs
pF
µs
µs
kSPS
kSPS
kHz
kHz
Effective throughput
Equivalent rate = effective throughput
×
7
6
BURR-BROWN [ BURR-BROWN CORPORATION ]
