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SBOS207B − OCTOBER 2001 − REVISED JUNE 2004
GENERAL DESCRIPTION
ANALOG INPUTS AND
The PGA2310 is a stereo audio volume control. It may be
used in a wide array of professional and consumer audio
equipment. The PGA2310 is fabricated in a mixed-signal
BiCMOS process, as to take advantage of the superior
analog characteristics for which it offers.
OUTPUTS
The PGA2310 includes two independent channels,
referred to as the left and right channels. Each channel has
a corresponding input and output pin. The input and output
pins are unbalanced, or referenced to analog ground
(either AGNDR or AGNDL). The inputs are named VINR
(pin 9) and VINL (pin 16), while the outputs are named
VOUTR (pin 11) and VOUTL (pin 14).
The heart of the PGA2310 is a resistor network, an analog
switch array, and a high-performance bipolar op amp
stage. The switches are used to select taps in the resistor
network that, in turn, determine the gain of the amplifier
stage. Switch selections are programmed using a serial
control port. The serial port allows connection to a wide
variety of host controllers. Figure 1 shows a functional
block diagram of the PGA2310.
The input and output pins may swing within 1.5V of the
analog power supplies, VA+ (pin 12) and VA− (pin 13).
Given VA+ = +15V and VA− = −15V, the maximum input or
output voltage range is 27VPP
.
It is important to drive the PGA2310 with a low source
impedance. If a source impedance of greater than 600Ω is
used, the distortion performance of the PGA2310 will
begin to degrade.
POWER-UP STATE
On power up, all internal flip-flops are reset. The gain byte
value for both the left and right channels are set to 00HEX
,
or mute condition. The gain will remain at this setting until
the host controller programs new settings for each channel
via the serial control port.
16
VINL
14
VOUT
L
8
MUTE
MUX
8
1
2
6
3
7
ZCEN
CS
8
8
15
10
Serial
Control
Port
AGNDL
AGNDR
SCLK
SDI
SDO
8
MUX
11
VOUT
R
9
VINR
12
13
4
5
−
VA+VA
VD+ DGND
Figure 1. PGA2310 Block Diagram
7
BB [ BURR-BROWN CORPORATION ]
