+15V
14
VO1 V+
13
2
1
HI-509
4
5
PGA204
PGA205
4
Over-Voltage
Protection
Feedback
12
A1
8
–
VIN
25kΩ
25kΩ
6
7
A1 16
Digitally Selected
Feedback Network
A3
A0
VO
15
14
13
12
11
10
9
+
VIN
A2
Ref
11
10
5
Over-Voltage
Protection
25kΩ
25kΩ
6
7
9
8
A0 A1
1 16
3
15
VOS
Adj
VO2
V–
–15V
Data Out
74HC574
Data In
To Address
Decoding Logic
CK
Data Bus
FIGURE 7. Multiplexed-Input Programmable Gain IA.
A0 A1
VO1
VI–N
VI+N
PGA204
PGA205
VO
Ref
VO2
A1 A0
220Ω
20kΩ
20kΩ
OPA177
FIGURE 8. Shield Drive Circuit.
+
VIN
A1
A1
PGA205
PGA205
AO
VO
–
AO
VO
PGA204
PGA205
–
VIN
VIN
+
Ref
R1
1MΩ
C1
0.1µF
A1 A0
GAIN A3
A2
A1 A0
1
2
4
0
0
1
1
1
1
1
0
1
0
1
1
1
1
0
0
0
0
0
1
1
0
0
0
0
1
0
1
1
f–3dB
=
2πR1C1
OPA602
= 1.59Hz
8
16
32
64
FIGURE 9. Binary Gain Steps, G=1 to G=64.
FIGURE 10. AC-Coupled PGIA.
®
PGA204/205
14
BB [ BURR-BROWN CORPORATION ]
