TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, and VS = ±15V, unless otherwise noted.
INPUT-REFERRED NOISE,
0.1 TO 10Hz, G = 1000
NOISE, 0.1 TO 10Hz, G = 1
0.5µV/Div
0.2µV/Div
1s/Div
1s/Div
be used to sense the output voltage directly at the load for
best accuracy.
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation
of the PGA204/205. Applications with noisy or high imped-
ance power supplies may require decoupling capacitors
close to the device pins as shown.
The output is referred to the output reference (Ref) terminal
which is normally grounded. This must be a low-impedance
connection to assure good common-mode rejection. A resis-
tance of 5Ω in series with the Ref pin will cause a typical
device to degrade to approximately 80dB CMR (G=1).
DIGITAL INPUTS
The digital inputs A0 and A1 select the gain according to the
logic table in Figure 1. Logic “1” is defined as a voltage
greater than 2V above digital ground potential (pin 14).
Digital ground can be connected to any potential from the
V– power supply to 4V less than V+. Digital ground is
normally connected to ground. The digital inputs interface
directly CMOS and TTL logic components.
The PGA204/205 has an output feedback connection (pin
12). Pin 12 must be connected to the output terminal (pin 11)
for proper operation. The output Feedback connection can
Approximately 1µA flows out of the digital input pins when
a logic “0” is applied. Logic input current is nearly zero with
a logic “1” input. A constant current of approximately
+15V
1µF
VO1
1
PGA204
PGA205
–
VIN
4
Over-Voltage
Protection
Feedback
A1
12
25kΩ
25kΩ
16
Digitally Selected
Feedback Network
A3
VO
15
14
11
V
O = G (VI+N – VI–N
)
Ref
10
A2
+
VIN
5
Over-Voltage
Protection
25kΩ
25kΩ
6
7
9
8
Sometimes shown in simplified form:
1µF
VOS
Adj
VO2
GAIN
–
VIN
PGA204 PGA205 A1 A0
PGA204
VO
1
1
2
4
8
0
0
1
1
0
1
0
1
+
+15V
VIN
10
100
1000
A1 A0
FIGURE 1. Basic Connections.
®
PGA204/205
10