SHIFT OF I/V OUT VOLTAGE
INSTALLATION
POWER SUPPLIES
If the user requires a bipolar voltage output centered around
0V or one-half of VCC, the output can be shifted by adding an
offset current on the inverting point of the I/V op amp as
shown in Figure 6.
Refer to “Pin Configuration” diagram for proper connection
of the PCM67/69A. The PCM67/69A requires only a +5V
supply. Both analog and digital supplies should be tied to-
getheratasinglepoint, asnorealadvantageisgainedbyusing
separate supplies. It is more important that both these supplies
be as “clean” as possible to reduce coupling of supply noise to
the output.
+VCC
(+5V)
R1
820Ω
FILTER CAPACITOR REQUIREMENTS
RNF
5kΩ
Asshowninthe“PinConfiguration”diagram,varioussizesof
decoupling capacitors can be used with no special tolerances
required. All capacitors should be as close to the appropriate
pins of the PCM67/69A as possible to reduce noise pickup
from surrounding circuitry.
+
R2
330Ω
10µF ~ 100µF
IOUT
C1
VOUT
VCOM
+
A power supply decoupling capacitor should be used near the
analog supply pin to maximize power supply rejection, as
shown in Figure 6, regardless of how good the supplies are.
Both commons should be connected to an analog ground
plane as close to the PCM67/69A as possible.
10µF ~ 100µF
C2
6V
0V
Note: R1 and C1 are noise de-coupling circuits from noise
on +VCC power supply line.
The value of these capacitors is influenced by actual board
layout design and noise from power supplies and other digital
input lines.
FIGURE 7. Useful Application Circuit for Shift of I/V Out
Voltage.
The best suitable value for the capacitors should be deter-
mined by the user’s actual application board.
INTERFACE CONTROL FUNCTION
Both the PCM67 and PCM69A (SOIC package type) are
capable of 16-bit L/R serial input and 20-bit L/R parallel input
as shown in Table 3.
VO
2
VCC
VCOM
+
VO
VO
2
or 0V
VCOM
(+3.5V)
VS
VSHT
MC1
MC2 MC3 DATA-R INPUT FORMAT
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
1
1
1
1
1
0
1
0
0
1
0
16-Bit L/R Serial(1)
16-Bit L/R Serial(1)
18-Bit L/R Serial(1)
18-Bit L/R Serial(1)
20-Bit L/R Parallel
20-Bit L/R Parallel [WDCK Invert]
18-Bit L/R Parallel
18-Bit L/R Parallel [WDCK Invert]
WDCK
WDCK
WDCK
WDCK
R L R
R L R
L
L
+VCC
RNF
L R
L R
LR
LR
1
ROS
IOS
X
X
X
X
IOUT
VOUT
VCOM
(3.5V)
NOTE: (1) Data input to Data-Lch (Pin 17) for L/R serial format.
TABLE III. Interface Control Function of SOIC.
In case of shift to ±3V swing, 0V center
VOUT
6V
1.2mA
RNF
=
=
= 5kΩ
1.2mA
PCM67P and PCM69AP (DIP package) have only 18-bit
L/R serial input function as shown in Table 4.
–FSR±(VS) = –3V after offset addition, shift voltage
VSHT is given by
VSHT = VCOM + 3V = 3.5 + 3 = 6.5V
MC1
DATA-R
INPUT FORMAT
Offset Current IOS is given by
WDCK
WDCK
LR L R
R L R
0
0
1
0
1
X
18-Bit L/R Serial
18-Bit L/R Serial
18-Bit L/R Parallel
VSHT
RNF
6.5V
5kΩ
IOS
=
=
= 1.3mA
L
Offset Resistor ROS is given by
V
CC – VCOM
TABLE IV. Interface Control Function of DIP.
5 – 3.5V
1.3mA
ROS
=
=
= 1.15kΩ
IOS
FIGURE 6. Shift of I/V Out Voltage.
®
PCM67/69A
8
BB [ BURR-BROWN CORPORATION ]
