OPA177 SPECIFICATIONS
At V
S
=
±15V,
T
A
= +25°C, unless otherwise noted.
OPA177F
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
Long-Term Input Offset
(1)
Voltage Stability
Offset Adjustment Range
Power Supply Rejection Ratio
INPUT BIAS CURRENT
Input Offset Current
Input Bias Current
NOISE
Input Noise Voltage
Input Noise Current
INPUT IMPEDANCE
Input Resistance
INPUT VOLTAGE RANGE
Common-Mode Input Range
(4)
Common-Mode Rejection
OPEN-LOOP GAIN
Large Signal Voltage Gain
OUTPUT
Output Voltage Swing
1Hz to 100Hz
(2)
1Hz to 100Hz
Differential Mode
(3)
Common-Mode
26
CONDITION
MIN
TYP
10
0.3
R
P
= 20kΩ
V
S
=
±3V
to
±18V
±3
125
0.3
0.5
85
4.5
45
200
±14
140
12,000
±14
±13
±12.5
60
0.3
0.6
40
3.5
1.3
60
4.5
2
1.5
±2
150
MAX
25
MIN
OPA177G
TYP
20
0.4
T
120
T
T
T
T
18.5
T
T
T
T
6000
T
T
T
T
T
T
T
T
T
T
T
T
2.8
±2.8
T
MAX
60
UNITS
µV
µV/Mo
mV
dB
nA
nA
nVrms
pArms
MΩ
GΩ
V
dB
V/mV
V
V
V
Ω
V/µs
MHz
mW
mW
mA
115
110
V
CM
=
±13V
R
L
≥
2kΩ
V
O
=
±10V
(5)
R
L
≥
10kΩ
R
L
≥
2kΩ
R
L
≥
1kΩ
±13
130
5110
±13.5
±12.5
±12
T
115
2000
T
T
T
Open-Loop Output Resistance
FREQUENCY RESPONSE
Slew Rate
Closed-Loop Bandwidth
POWER SUPPLY
Power Consumption
Supply Current
R
L
≥
2kΩ
G = +1
V
S
=
±15V,
No Load
V
S
=
±3V,
No Load
V
S
=
±15V,
No Load
0.1
0.4
T
T
At V
S
=
±15V,
–40°C
≤
T
A
≤
+85°C, unless otherwise noted.
OFFSET VOLTAGE
Input Offset Voltage
Average Input Offset
Voltage Drift
Power Supply Rejection Ratio
INPUT BIAS CURRENT
Input Offset Current
Average Input Offset Current
Drift
(6)
Input Bias Current
Average Input Bias Current
Drift
(6)
INPUT VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
OPEN-LOOP GAIN
Large Signal Voltage Gain
OUTPUT
Output Voltage Swing
POWER SUPPLY
Power Consumption
Supply Current
T
Same as specification for product to left.
NOTES: (1) Long-Term Input Offset Voltage Stability refers to the averaged trend line of V
OS
vs time over extended periods after the first 30 days of operation. Excluding
the initial hour of operation, changes in V
OS
during the first 30 operating days are typically less than 2µV. (2) Sample tested. (3) Guaranteed by design. (4) Guaranteed
by CMRR test condition. (5) To insure high open-loop gain throughout the
±10V
output range, A
OL
is tested at –10V
≤
V
O
≤
0V, 0V
≤
V
O
≤
+10V, and –10V
≤
V
O
≤
+10V.
(6) Guaranteed by end-point limits.
±13
120
2000
±12
15
0.1
V
S
=
±3V
to
±18V
110
120
0.5
1.5
0.5
8
2.2
40
±4
40
40
0.3
106
20
0.7
115
T
T
T
15
4.5
85
±6
60
100
1.2
µV
µV/°C
dB
nA
pA/°C
nA
pA/°C
V
CM
=
±13V
R
L
≥
2kΩ, V
O
=
±10V
R
L
≥
2kΩ
V
S
=
±15V,
No Load
V
S
=
±15V,
No Load
±13.5
140
6000
±13
60
2
75
25
T
110
1000
T
T
T
4000
T
T
T
T
T
V
dB
V/mV
V
mW
mA
®
OPA177
2