DISCUSSION OF
SPECIFICATIONS
DC CHARACTERISTICS
Input Offset Voltage
The static or dc transfer accuracy of transmitting the multi-
plexer input voltage to the output depends on the channel
ON resistance (RON), the load impedance, the source imped-
ance, the load bias current and the multiplexer leakage
current.
Bias current generates an input OFFSET voltage as a result
of the IR drop across the multiplexer ON resistance and
source resistance. A load bias current of 10nA will generate
an offset voltage of 20µV if a 1kΩ source is used. In general,
for the MPC506A, the OFFSET voltage at the output is
determined by:
Single-Ended Multiplexer Static Accuracy
The major contributors to static transfer accuracy for single-
ended multiplexers are:
VOFFSET = (IB + IL) (RON + RS)
where IB = Bias current of device multiplexer is driving
IL = Multiplexer leakage current
Source resistance loading error
Multiplexer ON resistance error
dc offset error caused by both load bias current and
multiplexer leakage current.
RON = Multiplexer ON resistance
RS = Source resistance
Differential Multiplexer Static Accuracy
Resistive Loading Errors
Static accuracy errors in a differential multiplexer are diffi-
cult to control, especially when it is used for multiplexing
low-level signals with full-scale ranges of 10mV to 100mV.
The source and load impedances will determine the input
resistive loading errors. To minimize these errors:
• Keep loading impedance as high as possible. This mini-
mizes the resistive loading effects of the source resistance
and multiplexer ON resistance. As a guideline, load
impedance of 108Ω or greater will keep resistive loading
errors to 0.002% or less for 1000Ω source impedances. A
106Ω load impedance will increase source loading error
to 0.2% or more.
The matching properties of the multiplexer, source and
output load play a very important part in determining the
transfer accuracy of the multiplexer. The source impedance
unbalance, common-mode impedance, load bias current
mismatch, load differential impedance mismatch, and com-
mon-mode impedance of the load all contribute errors to the
multiplexer. The multiplexer ON resistance mismatch, leak-
age current mismatch and ON resistance also contribute to
differential errors.
• Use sources with impedances as low as possible. A
1000Ω source resistance will present less than 0.001%
loading error and 10kΩ source resistance will increase
source loading error to 0.01% with a 108 load impedance.
Referring to Figure 2, the effects of these errors can be
minimized by following the general guidelines described in
this section, especially for low-level multiplexing applica-
tions.
Input resistive loading errors are determined by the follow-
ing relationship (see Figure 1).
IBIAS
RS1
RON
RS1A
RON1A
IBIAS A
VM
Cd/2
Cd/2
Measured
Voltage
IL
Rd/2
RCM
IL
RCM
RS16
ROFF
VS1
VS1
ZL
ZL
RS1B
RON1B IBIAS B
RCM1
VS16
CCM
Rd/2
RS8A
ROFF8A
FIGURE 1. MPC506A Static Accuracy Equivalent Circuit.
Source and Multiplexer Resistive Loading Error
VS8
RS8B
ROFF8B
RCM8
R
S +RON
(RS +RON) =
×100
R
S +RON +RL
where RS = source resistance
RL = load resistance
FIGURE 2. MPC507A Static Accuracy Equivalent Circuit.
RON = multiplexer ON resistance
MPC506A, MPC507A
5
SBFS018A
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