The current-sensing resistor should have a relatively low
value of resistance (to minimize power dissipation), a fairly
low inductance (to accurately reflect high-frequency signal
components), and a reasonably tight tolerance (to maintain
overall circuit accuracy).
LAYOUT SUGGESTIONS
1. Bypass capacitors should be located as close as possible
to the input and output power supply pins.
2. In some applications, offset voltage can be reduced by
placing a 0.01µF capacitor from pin 2 and/or pin 3 to
GND1. This noise can be caused by the combination of
long input leads and the switched-capacitor nature of the
input circuit. This capacitor(s) should be placed as close
to the isolation amplifier as possible.
3. The trace lengths at input should be kept short or a twisted
wire pair should be used to minimize EMI and inductance
effects. For optimum performance, the input signal should
be as close to the input pins a possible.
4. A maximum distance between the input and output sides
of the isolation amplifier should be maintained in the
layout in order to minimize stray capacitance. This prac-
tice will help obtain optimal Isolation Mode performance.
Ground planes should not pass below the device on the
PCB.
5. Care should be taken in selecting isolated power supplies
or regulators. The ISO130 can be affected by changes in
the power supply voltages. Carefully regulated power
supplies are recommended.
6. For improved nonlinearity and nonlinearity temperature
drift performance, pin 3 should be tied to GND1 and the
input voltage range of pin 2 should be less than 100mV.
®
11
ISO130
BB [ BURR-BROWN CORPORATION ]
