SPECIFICATIONS: VS = +5V
At TA = +25°C, VS = +5V, RL = 10kΩ connected to VS/2, and Reference Pin connected to VS/2, unless otherwise noted.
INA132P, U
INA132PA, UA
TYP
PARAMETER
OFFSET VOLTAGE(1)
Initial
CONDITIONS
MIN
TYP
MAX
MIN
MAX
UNITS
RTO
±150
±2
±500
✽
✽
±750
µV
vs Temperature
µV/°C
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Common-Mode Rejection
0
2(V+)–2
✽
✽
V
VCM = 0V to 8V, RS = 0Ω
76
90
70
✽
dB
OUTPUT
Voltage, Positive
Negative
RL = 100kΩ
RL = 100kΩ
RL = 10kΩ
RL = 10kΩ
(V+)–1
+0.25
(V+)–1
+0.25
(V+)–0.75
+0.06
✽
✽
✽
✽
✽
✽
✽
✽
V
V
V
V
Positive
(V+)–0.8
+0.12
Negative
POWER SUPPLY
Rated Voltage
+5
✽
✽
V
V
Voltage Range
Quiescent Current
+2.7
+36
✽
✽
✽
IO = 0mA
±155
±185
µA
✽Specifications the same as INA132P.
NOTE: (1) Include effects of amplifier’s input bias and offset currents.
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
TOP VIEW
DIP/SOIC
Supply Voltage, V+ to V– .................................................................... 36V
Input Voltage Range .......................................................................... ±80V
Output Short-Circuit (to ground) .............................................. Continuous
Operating Temperature ................................................. –55°C to +125°C
Storage Temperature..................................................... –55°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
1
No Internal Connection
Ref
8
7
6
5
2
V+
–In
ORDERING INFORMATION
3
Output
Sense
+In
PACKAGE
DRAWING
NUMBER(1)
TEMPERATURE
RANGE
4
V–
PRODUCT
PACKAGE
INA132PA
INA132P
INA132UA
INA132U
8-Pin Plastic DIP
8-Pin Plastic DIP
SO-8 Surface-Mount
SO-8 Surface-Mount
006
006
182
182
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
®
3
INA132