SINGLE SUPPLY OPERATION
The INA118 can be used on single power supplies of +2.7V
to +36V. Figure 5 shows a basic single supply circuit. The
output Ref terminal is connected to ground. Zero differential
input voltage will demand an output voltage of 0V (ground).
Actual output voltage swing is limited to approximately
35mV above ground, when the load is referred to ground as
shown. The typical performance curve “Output Voltage vs
Output Current” shows how the output voltage swing varies
with output current.
With single supply operation, V
IN
and V
IN
must both be
0.98V above ground for linear operation. You cannot, for
instance, connect the inverting input to ground and measure
a voltage connected to the non-inverting input.
To illustrate the issues affecting low voltage operation,
consider the circuit in Figure 5. It shows the INA118,
operating from a single 3V supply. A resistor in series with
the low side of the bridge assures that the bridge output
+
–
voltage is within the common-mode range of the amplifier’s
inputs. Refer to the typical performance curve “Input Com-
mon-Mode Range vs Output Voltage” for 3V single supply
operation.
INPUT PROTECTION
The inputs of the INA118 are individually protected for
voltages up to
±40V.
For example, a condition of –40V on
one input and +40V on the other input will not cause
damage. Internal circuitry on each input provides low series
impedance under normal signal conditions. To provide
equivalent protection, series input resistors would contribute
excessive noise. If the input is overloaded, the protection
circuitry limits the input current to a safe value of approxi-
mately 1.5 to 5mA. The typical performance curve “Input
Bias Current vs Input Overload Voltage” shows this input
current limit behavior. The inputs are protected even if the
power supplies are disconnected or turned off.
INSIDE THE INA118
Figure 1 shows a simplified representation of the INA118.
The more detailed diagram shown here provides addi-
tional insight into its operation.
Each input is protected by two FET transistors that
provide a low series resistance under normal signal con-
ditions, preserving excellent noise performance. When
excessive voltage is applied, these transistors limit input
current to approximately 1.5 to 5mA.
A
1
Out = V
CM
– V
BE
– (10µA • 25kΩ) – V
O
/2
A
2
Out = V
CM
– V
BE
– (10µA • 25kΩ) + V
O
/2
Output Swing Range A
1
, A
2
; (V+) – 0.65V to (V–) + 0.06V
Amplifier Linear Input Range: (V+) – 0.65V to (V–) + 0.98V
The differential input voltage is buffered by Q
1
and Q
2
and impressed across R
G
, causing a signal current to flow
through R
G
, R
1
and R
2
. The output difference amp, A
3
,
removes the common-mode component of the input sig-
nal and refers the output signal to the Ref terminal.
Equations in the figure describe the output voltages of A
1
and A
2
. The V
BE
and IR drop across R
1
and R
2
produce
output voltages on A
1
and A
2
that are approximately 1V
lower than the input voltages.
10µA
V
B
10µA
V
O
= G • (V
IN
– V
IN
)
Output Swing Range:
(V+) – 0.8V to (V–) + 0.35V
C
2
60kΩ
60kΩ
A
3
60kΩ
V
O
60kΩ
+
–
Input Bias Current
Compensation
C
1
A
1
A
2
–
V
IN
Ref
Q
1
R
1
25kΩ
R
G
(External)
R
2
25kΩ
Q
2
V
D
/2
V
CM
V
D
/2
+
V
IN
FIGURE 4. INA118 Simplified Circuit Diagram.
®
INA118
10
BURR-BROWN [ BURR-BROWN CORPORATION ]
