DCP01B SERIES
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SBVS012B − DECEMBER 2000 − REVISED OCTOBER 2004
DUAL OUTPUT VOLTAGE DCP AND DCVs
The voltage output for the dual DCPs is half wave rectified;
therefore, the discharge time is 1.25µs. Repeating the
above calculations using the 100% load resistance of 25Ω
(0.2A per output), the results are shown below:
τ
= 25µs
T
DIS
= 1.25µs.
V
DIS
= 244mV
V
ESR
= 20mV
Ripple Voltage = 266mV
This time, it is the capacitor discharging that is contributing
to the largest component of ripple. Changing the output
filter to 10µF, and repeating the calculations:
Ripple Voltage = 45mV.
This value is composed of almost equal components.
The above calculations are given only as a guide.
Capacitor parameters usually have large tolerances and
can be susceptible to environmental conditions.
The Sync pin, when not being used, is best left as a floating
pad. A ground ring or annulus connected around the pin
will prevent noise being conducted onto the pin. If the Sync
pin is being connected to one or more Sync pins, then the
linking trace should be narrow and must be kept short in
length. In addition, no other trace should be in close
proximity to this trace because that will increase the stray
capacitance on this pin, and that will effect the
performance of the oscillator.
Ripple and Noise
Careful consideration should be given to the layout of the
PCB, in order that the best results can be obtained.
The DCP01B is a switching power supply and as such can
place high peak current demands on the input supply. In
order to avoid the supply falling momentarily during the
fast switching pulses, ground and power planes should be
used to connect the power to the input of DCP01B. If this
is not possible, then the supplies must be connected in a
star formation with the traces made as wide as possible.
If the SYNC
IN
pin is being used, then the trace connection
between device SYNC
IN
pins should be short to avoid
stray capacitance. If the SYNC
IN
pin is not being used, it
is advisable to place a guard ring (connected to input
ground) around this pin to avoid any noise pick up.
The output should be taken from the device using ground
and power planes; this ensures minimum losses.
A good quality low-ESR ceramic capacitor placed as close
as practical across the input will reduce reflected ripple
and ensure a smooth startup.
A good quality low-ESR capacitor (ceramic preferred)
placed as close as practical across the rectifier output
terminal and output ground gives the best ripple and noise
performance. See SBVA012 for more information on noise
rejection.
PCB LAYOUT
(PCB) layout for the two conventional (DCP01/02,
DCV01), and two SO-28 surface-mount packages
(DCP02U). Figure 7 shows the schematic.
Input power and ground planes have been used, providing
a low-impedance path for the input power. For the output,
the common or 0V has been connected via a ground plane,
while the connections for the positive and negative voltage
outputs are conducted via wide traces in order to minimize
losses.
The location of the decoupling capacitors in close
proximity to their respective pins ensures low losses due
to the effects of stray inductance; thus, improving the ripple
performance. This is of particular importance to the input
decoupling capacitor as this supplies the transient current
associated with the fast switching waveforms of the power
drive circuits.
THERMAL MANAGEMENT
Due to the high power density of this device, it is advisable
to provide ground planes on the input and output.
13
BURR-BROWN [ BURR-BROWN CORPORATION ]
