FUNCTIONAL DESCRIPTION
OVERVIEW
The DCP0105 offers 1W of unregulated output power from
a 5V input source with a typical efficiency of up to 75%.
This is achieved through highly integrated packaging tech-
nology and the implementation of a custom power stage and
control IC.
POWER STAGE
This uses a push-pull, center-tapped topology switching at
400kHz (divide by 2 from 800kHz oscillator).
OSCILLATOR AND WATCHDOG
The on-board 800kHz oscillator provides the switching
frequency via a divide by 2 circuit and allows synchroniza-
tion via the SYNC
IN
pins. To synchronize any number of
DCP0105 family of devices, simply tie the SYNC
IN
pins
together (see the Synchronization section). The watchdog
circuitry protects the DC/DC against a stopped oscillator and
checks the oscillator frequency which will shut down the
output stage if it drops below a certain threshold—i.e., it will
be tri-stated after approximately 10µs.
THERMAL SHUTDOWN
The DCP0105 is also protected by thermal shutdown. If the
on-chip temperature reaches a predetermined value, the DC/
DC will shutdown. This effectively gives indefinite short
circuit protection for the DC/DC.
SYNCHRONIZATION
Any number of DCP0105 devices can be synchronized
by connecting the SYNC
IN
pins on the devices together
(see Figure 1). All the DCP0105 devices will then self-
synchronize.
This same synchronization method will apply to other V
IN
versions of the DCP01 family, allowing synchronization of
various V
OUT
and V
IN
DC/DCs.
Care must taken as synchronized DCP0105s will turn on
simultaneously very quickly and draw 300mA each until
each output capacitor is fully charged. This may exact a
heavy demand on the input power supply.
The SYNC
OUT
pin gives an unrectified 400kHz signal from
the transformer. This can be used to set the timing of
external circuitry on the output side. In noise sensitive
applications any pick-up from the SYNC
OUT
pin can be
minimized by putting a guard ring round the pin (see
Figure 7).
DIVIDE BY 2 RESET
Isolated DC/DC converter performance normally suffers
after power reset. This is because a change in the steady state
transformer flux creates an offset after power-up. The DCP01
family does not suffer from this problem. This is achieved
through a patented
(1)
technique employed on the divide by 2
reset circuitry resulting in no change in output phase after
power interruption.
CONSTRUCTION
The DCP0105’s basic construction is the same as standard
ICs. There is no substrate within the molded package. The
DCP0105 is constructed using an IC, rectifier diodes, and a
wound magnetic toroid on a leadframe. As there is no solder
within the package, the DCP0105 does not require any
special PCB assembly processing. This results in an isolated
DC/DC with inherently high reliability.
+5V
C
5
470nF
1 per DCP01
+5V
1
2
V
S
0V
DCP0105
–Out 1
+Out 1
C
3
470nF
5
6
7
0V
Out+
8
SYNC
IN
14
1
2
V
S
0V
SYNC
IN
14
DCP0105
–Out 2
+Out 2
C
2
470nF
5
6
7
0V
Out+
8
ADDITIONAL FUNCTIONS
1
2
V
S
0V
DCP0105
–Out 3
+Out 3
C
4
470nF
5
6
7
0V
Out+
8
SYNC
IN
14
DISABLE/ENABLE
The DCP0105 can be disabled or enabled by driving the
SYNC
IN
pin with an open drain CMOS gate. If the SYNC
IN
pin is pulled LOW, the DCP0105 will disable. The disable
time depends on the output loading but the internal shutdown
takes up to 10µs. Making the gate open drain will re-enable
the DCP0105. However, there is a trade-off in using this
function; the DCP0105 quiescent current may increase and
the on-chip oscillator may run slower. This degradation in
performance is dependent on the external CMOS gate capaci-
tance. Therefore, the smaller the capacitance, the lower the
®
FIGURE 1. Standard Interface.
13
DCP0105
BURR-BROWN [ BURR-BROWN CORPORATION ]
