interface using a 4066 quad switch. The CTL and SYNCON
pins are used to select external synchronization or self-
synchronization.
performance decrease. Driving the SYNCIN pin with a CPU
type tri-state output, which has a low output capacitance,
offers the lowest reduction in performance.
This interface can also be used to stop (disable) the DCP0105.
DECOUPLING
CTL
SYNCON
FUNCTION
Ripple Reduction
1
—
0
1
0
1
External Sync
Self-Sync
Device Stop
The high switching frequency of 400kHz allows simple
filtering. To reduce ripple, it is recommended that 0.47µF
capacitors are used on VS and VOUT (see Figure 2). Both
outputs on dual output DCP0105 devices should be decoupled
to pin 5. In applications where power is supplied over long
lines and output loading is high, it may be necessary to use
a 2.2µF capacitor on the input to insure startup.
+5V
1
2
VS
0V
C1
0.47µF
There is no restriction on the size of the output capacitor
used to reduce ripple. The DCP0105 will start into any
capacitive load. Low ESR capacitors will give the best
reduction.
DCP0105
5
6
0V
VOut
2W
2W
C2
0.47µF
R1
27Ω
R2
330Ω
EXTERNAL SYNCHRONIZATION
The DCP0105 can be synchronized externally if required
using a simple external interface. Figure 3 shows a universal
FIGURE 2. DCP010505 Fully Loaded.
+5V
1
2
14
VCC
0V
SYNC
0V
DCP0105
+5V
+5V
5
6
7
–Out 1
+Out 1
Out–
Out+
C2
470nF
C1
470nF
(One Per
DC/DC)
R1
33kΩ
8
0V
I/O1A
U1
I/O1B
CONT
CTL
1
2
14
VCC
0V
SYNC
0V
FREQ IN
DCP0105
I/O1A
I/O1B
U3
5
6
7
–Out 2
+Out 2
Out–
Out+
C3
470nF
CONT
8
I/O1A
I/O1B
U4
CONT
R2
33kΩ
0V
I/O1A
I/O1B
U5
1
2
14
VCC
0V
SYNC
CONT
SYNC ON
R3
33kΩ
4066
0V
DCP0105
5
6
7
–Out 3
+Out 3
Out–
Out+
C4
470nF
8
FIGURE 3. Universal Interface.
®
14
DCP0105