Most of the dissipated heat comes from input side common
(pin 2). To a lesser extent, the +VOUT pin (pin 6) also
dissipates heat from the package. In the layout shown in
Figure 7, the large copper areas next to pins 2 and 6 will
provide excellent heat dissipation paths.
dependent on the VIN of the DCP010505. With a VIN of
5.25V, the LP2986 LDO can deliver up to 165mA.
The LP2986 LDO has a very low dropout voltage of typi-
cally less than 180mV, which allows us to deliver 4.75V
guaranteed from a 5VOUT unregulated DC/DC. It also offers
low output flagging and shutdown capability and is supplied
in either MSOP-8 or SO-8 packages ensuring additional
board area is minimal and low profile is maintained.
The tracking in Figure 7, shown in dotted lines, will provide
shielding for the SYNCIN (pin 14) and SYNCOUT (pin 7)
pins if necessary.
As described earlier in the Disable/Enable section of this
data sheet, any additional capacitance to the 25pF internal
capacitor at the SYNCIN pin will affect performance. If there
is the possibility of significant leakage capacitance at the
SYNCIN pin, it can be shielded as shown.
SIP DC/DC
DCP01xx
As described earlier in the Synchronization section of this
data sheet, the SYNCOUT pin can be shielded as shown to
minimize noise pick-up in sensitive applications.
+VIN
–VIN
0V
+VOUT
–VOUT
FIGURE 8. PCB Layout for DCP0105 and Competitive SIP
DC/DC.
5.0
4.8
4.6
4.4
Bottom View
FIGURE 7. Thermal Management Layout.
LAYOUT FOR DCP0105 AND SIP PRODUCTS
Figure 8 shows a layout to allow the use of a DCP0105 and
a competitive SIP isolated DC/DC converter.
4.2
VIN = 5V
VIN = 5.25V
VIN = 4.75V
4.0
3.8
POST REGULATION OF THE DCP010505P USING
THE LP2986 LDO REGULATOR
0
50
100
150
200
In digital applications where the load range is wide or
evolving, or the input supply voltage is not well regulated
and 5V±5% or 5V±V10% cannot be guaranteed, it is often
necessary to have a regulated 5V output from the DCP0105.
IOUT (mA)
FIGURE 9. DCP010505P AND LP2986 Regulator.
It is possible to post regulate the 5VOUT DCP0105 and still
guarantee a minimum VOUT of 4.75V. This still gives the
benefits of isolation in reducing the power supply noise to
5V digital circuitry.
DCP01 AND LP2986 APPLICATION CIRCUIT
Figure 10 shows the LP2986 in series with the DCP010505
output. The 2.2µF capacitor on the input of the LP2986 and
the 4.7µF capacitor on the output are the minimum recom-
mended for good ripple reduction. Pin 7 on the LP2986 flags
an error by going LOW if the output drops 5% below
nominal.
By using an ultra-low dropout regulator (e.g., National
Semiconductor’s LP2986IM-5.0) in series with the output of
a 5VOUT DCP0105, it is possible to supply up to 100% load
current (depending on VIN). Figure 9 shows the typical load
current for the post-regulated 5VIN/5VOUT DCP010505. It is
possible with a VIN of 5V to supply 130mA. Because of the
1:1 line regulation of the DCP0105, a 5% change in the input
will result in a 5% change in the output. Therefore, the
amount of current that the LDO can deliver is strongly
®
16
DCP0105
BB [ BURR-BROWN CORPORATION ]
