SPECIFICATIONS
At TA = full specified temperature range, +VA = +5V, +VD = +5V, differential transformer coupled output, 50Ω doubly terminated, unless otherwise specified.
DAC908U/E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Resolution
Output Update Rate (fCLOCK
Output Update Rate
8
200
165
Bits
MSPS
MSPS
°C
)
4.5V to 5.5V
2.7V to 3.3V
Ambient, TA
165
125
–40
Full Specified Temperature Range, Operating
+85
STATIC ACCURACY(1)
TA = +25°C
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
fCLOCK = 25MSPS, fOUT = 1.0MHz
–0.5
–0.5
±0.25
±0.25
+0.5
+0.5
LSB
LSB
DYNAMIC PERFORMANCE
TA = +25°C
Spurious Free Dynamic Range (SFDR)
fOUT = 1.0MHz, fCLOCK = 25MSPS
fOUT = 2.1MHz, fCLOCK = 50MSPS
fOUT = 5.04MHz, fCLOCK = 50MSPS
fOUT = 5.04MHz, fCLOCK = 100MSPS
fOUT = 20.2MHz, fCLOCK = 100MSPS
fOUT = 25.3MHz, fCLOCK = 125MSPS
fOUT = 41.5MHz, fCLOCK = 125MSPS
fOUT = 27.4MHz, fCLOCK = 165MSPS
fOUT = 54.8MHz, fCLOCK = 165MSPS
Spurious Free Dynamic Range within a Window
fOUT = 2.1MHz, fCLOCK = 50MSPS
fOUT = 5.04MHz, fCLOCK = 100MSPS
Total Harmonic Distortion (THD)
fOUT = 2.1MHz, fCLOCK = 50MSPS
fOUT = 5.04MHz, fCLOCK = 100MSPS
fOUT = 20.2MHz, fCLOCK = 100MSPS
Output Settling Time(2)
To Nyquist
64
70
69
67
67
61
57
51
58
52
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
2MHz Span
4MHz Span
70
69
dBc
dBc
–72
–66
–60
30
2
dBc
dBc
dBc
ns
ns
ns
to 0.1%
10% to 90%
10% to 90%
Output Rise Time(2)
Output Fall Time(2)
2
Glitch Impulse
3
pV-s
DC-ACCURACY
Full-Scale Output Range(3)(FSR)
Output Compliance Range
Gain Error
Gain Error
Gain Drift
All Bits High, IOUT
2.0
–1.0
–10
–10
20.0
+1.25
+10
mA
V
With Internal Reference
With External Reference
With Internal Reference
With Internal Reference
With Internal Reference
±1
±2
±120
%FSR
%FSR
ppmFSR/°C
%FSR
ppmFSR/°C
%FSR/V
%FSR/V
pA/√Hz
kΩ
+10
Offset Error
Offset Drift
–0.025
+0.025
±0.1
Power Supply Rejection, +VA
Power Supply Rejection, +VD
Output Noise
Output Resistance
Output Capacitance
–0.2
–0.025
+0.2
+0.025
IOUT = 20mA, RLOAD = 50Ω
50
200
12
IOUT, IOUT to Ground
pF
REFERENCE
Reference Voltage
Reference Tolerance
+1.24
±5
V
%
Reference Voltage Drift
Reference Output Current
Reference Input Resistance
Reference Input Compliance Range
Reference Small Signal Bandwidth(4)
±50
10
1
ppmFSR/°C
µA
MΩ
V
0.1
1.25
1.3
MHz
DIGITAL INPUTS
Logic Coding
Straight Binary
Latch Command
Rising Edge of Clock
Logic High Voltage, VIH
Logic Low Voltage, VIL
Logic High Voltage, VIH
Logic Low Voltage, VIL
+VD = +5V
+VD = +5V
+VD = +3V
+VD = +3V
+VD = +5V
+VD = +5V
3.5
2
5
0
3
V
V
V
1.2
0.8
0
V
(5)
Logic High Current, IIH
±20
±20
5
µA
µA
pF
Logic Low Current, IIL
Input Capacitance
Theinformationprovidedhereinisbelievedtobereliable;however,BURR-BROWNassumesnoresponsibilityforinaccuraciesoromissions.BURR-BROWNassumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
withoutnotice. Nopatentrightsorlicensestoanyofthecircuitsdescribedhereinareimpliedorgrantedtoanythirdparty. BURR-BROWNdoesnotauthorizeorwarrant
any BURR-BROWN product for use in life support devices and/or systems.
®
2
DAC908
BB [ BURR-BROWN CORPORATION ]
