PIN CONFIGURATION
PIN DESCRIPTIONS
PIN
DESIGNATOR
DESCRIPTION
Top View
SO/TSSOP
1
2
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
PD
Data Bit 1 (D13), MSB
Data Bit 2 (D12)
Data Bit 3 (D11)
Data Bit 4 (D10)
Data Bit 5 (D9)
3
4
5
6
Data Bit 6 (D8)
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
1
2
3
4
5
6
7
8
9
28 CLK
27 +VD
26 DGND
25 NC
7
Data Bit 7 (D7)
8
Data Bit 8 (D6)
9
Data Bit 9 (D5)
10
11
12
13
14
15
Data Bit 10 (D4)
Data Bit 11 (D3)
Data Bit 12 (D2)
Data Bit 13 (D1)
Data Bit 14 (D0), LSB
24 +VA
23 BYP
22 IOUT
21 IOUT
20 AGND
19 BW
Power Down, Control Input; Active
High. Contains internal pull-down circuit;
may be left unconnected if not used.
DAC904
16
17
INT/EXT
REFIN
Reference Select Pin; Internal ( = 0) or
External ( = 1) Reference Operation.
Reference Input/Ouput. See Applications
section for further details.
Bit 10 10
Bit 11 11
Bit 12 12
Bit 13 13
Bit 14 14
18
19
FSA
BW
Full-Scale Output Adjust
18 FSA
17 REFIN
16 INT/EXT
15 PD
Bandwidth/Noise Reduction Pin:
Bypass with 0.1µF to +VA for Optimum
Performance.
20
21
22
23
24
25
26
27
28
AGND
IOUT
Analog Ground
Complementary DAC Current Output
DAC Current Output
IOUT
BYP
+VA
Bypass Node: Use 0.1µF to AGND
Analog Supply Voltage, 2.7V to 5.5V
No Connection
NC
DGND
+VD
Digital Ground
Digital Supply Voltage, 2.7V to 5.5V
Clock Input
CLK
TYPICAL CONNECTION CIRCUIT
+5V
+5V
0.1µF
+VA
+VD
BW
DAC904
IOUT
IOUT
1:1
LSB
FSA
Switches
BYP
Current
Sources
REFIN
Segmented
MSB
50Ω
0.1µF
20pF
50Ω
20pF
RSET
Switches
0.1µF
INT/EXT
PD
Latches
+1.24V Ref.
14-Bit Data Input
D13.......D0
AGND
CLK
DGND
®
4
DAC904
BB [ BURR-BROWN CORPORATION ]
