SPECIFICATION (SINGLE SUPPLY)
At TA = –40°C to +85°C, VCC = +15V, VDD = +5V, VSS = GND, VREFH = +10V, VREFL = 0V, unless otherwise noted.
DAC7724N, U
DAC7725N, U
DAC7724NB, UB
DAC7725NB, UB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ACCURACY
Linearity Error(1)
±2
±2
±1
±1
±1
±1
LSB(2)
LSB
Linearity Matching(3)
Differential Linearity Error
Monotonicity
LSB
TMIN to TMAX
Code = 004H
12
✻
Bits
Zero-Scale Error
±4
✻
LSB
Zero-Scale Drift
Zero-Scale Matching(3)
2
✻
✻
ppm/°C
LSB
±4
±4
±4
±2
✻
Full-Scale Error
Code = FFFH
At Full Scale
LSB
Full-Scale Matching(3)
Power Supply Sensitivity
±2
LSB
20
ppm/V
ANALOG OUTPUT
Voltage Output(4)
Output Current
VREFL
VREFH
✻
✻
✻
V
±5
mA
pF
Load Capacitance
Short-Circuit Current
Short-Circuit Duration
No Oscillation
500
±20
✻
✻
✻
mA
To VCC or GND
Indefinite
REFERENCE INPUT
VREFH Input Range
VREFL Input Range
VREFL +1.25
+10
✻
✻
✻
✻
✻
✻
✻
✻
V
0
VREFH – 1.25
V
Ref High Input Current
Ref Low Input Current
–0.3
–2.0
1.5
0
mA
mA
DYNAMIC PERFORMANCE
Settling Time(5)
To ±0.012%, 10V Output Step
8
0.25
2
10
✻
✻
✻
✻
µs
LSB
Channel-to-Channel Crosstalk
Digital Feedthrough
nV-s
Output Noise Voltage
f = 10kHz
65
✻
nV/√Hz
DIGITAL INPUT/OUTPUT
Logic Family
Logic Levels
VIH
TTL-Compatible CMOS
✻
IIH ≤ ±10µA
IIL ≤ ±10µA
2.4
VDD +0.3
0.8
✻
✻
✻
✻
✻
✻
✻
✻
V
V
V
V
VIL
–0.3
3.6
VOH
IOH = –0.8mA
IOL = 1.6mA
VDD
VOL
0.0
0.4
Data Format
Straight Binary
✻
POWER SUPPLY REQUIREMENTS
VDD
+4.75
14.25
+5.25
15.75
✻
✻
✻
✻
✻
✻
V
V
VCC
IDD
50
3.0
45
✻
✻
✻
µA
mA
mW
ICC
Power Dissipation
TEMPERATURE RANGE
Specified Performance
–40
+85
✻
✻
°C
NOTES: (1) If VSS = 0V, specification applies at code 004H and above. (2) LSB means Least Significant Bit, when VREFH equals +10V and VREFL equals 0V, then
one LSB equals 2.44mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale error.
(5) Full-scale positive 10V step and negative step from code FFFH to 004H.
®
3
DAC7724, 7725