PIN CONFIGURATION—P, U Packages
PIN CONFIGURATION—E Package
Top View
SSOP
Top View
PDIP, SOIC
VDD
VOUTD
VOUTC
VREFL
VREFH
VOUTB
VOUTA
VSS
1
2
3
4
5
6
7
8
16 RESETSEL
VDD
VOUTD
VOUTC
VREFL
NIC
1
2
3
4
5
6
7
8
9
20 RESETSEL
19 RESET
18 LOADDACS
17 NIC
15 RESET
14 LOADDACS
13 NIC
DAC7614P, U
12 CS
16 NIC
DAC7614E
11 CLK
NIC
15 NIC
10 SDI
VREFH
VOUTB
VOUTA
14 CS
9
GND
13 CLK
12 SDI
VSS 10
11 GND
PIN DESCRIPTIONS—P, U Packages
PIN DESCRIPTIONS—E Package
PIN
LABEL
DESCRIPTION
PIN
LABEL
DESCRIPTION
1
2
3
4
VDD
Positive Analog Supply Voltage, +5V nominal.
DAC D Voltage Output
1
2
3
4
VDD
Positive Analog Supply Voltage, +5V nominal.
DAC D Voltage Output
VOUTD
VOUTC
VREFL
VOUTD
VOUTC
VREFL
DAC C Voltage Output
DAC C Voltage Output
Reference Input Voltage Low. Sets minimum out-
put voltage for all DACs.
Reference Input Voltage Low. Sets minimum out-
put voltage for all DACs.
5
VREFH
Reference Input Voltage High. Sets maximum out-
put voltage for all DACs.
5
6
7
NIC
NIC
Not Internally Connected.
Not Internally Connected.
6
7
8
VOUTB
VOUTA
VSS
DAC B Voltage Output
DAC A Voltage Output
VREFH
Reference Input Voltage High. Sets maximum out-
put voltage for all DACs.
Negative Analog Supply Voltage, 0V or –5V nomi-
nal.
8
VOUTB
VOUTA
VSS
DAC B Voltage Output.
DAC A Voltage Output.
9
9
GND
SDI
Ground
10
Negative Analog Supply Voltage, 0V or –5V nomi-
nal.
10
11
12
13
14
Serial Data Input
Serial Data Clock
Chip Select Input
Not Internally Connected.
CLK
11
12
13
14
15
16
17
18
GND
SDI
Ground
CS
Serial Data Input
NIC
CLK
Serial Data Clock
LOADDACS
The selected DAC register becomes transparent
when LOADDACS is LOW. It is in the latched state
when LOADDACS is HIGH.
CS
Chip Select Input
NIC
Not Internally Connected.
Not Internally Connected.
Not Internally Connected.
NIC
15
16
RESET
Asynchronous Reset Input. Sets all DAC registers
to either zero-scale (000H) or mid-scale (800H)
when LOW. RESETSEL determines which code is
active.
NIC
LOADDACS
The selected DAC register becomes transparent
when LOADDACS is LOW. It is in the latched state
when LOADDACS is HIGH.
RESETSEL
When LOW, a LOW on RESET will cause all DAC
registers to be set to code 000H. When RESETSEL
is HIGH, a LOW on RESET will set the registers to
code 800H.
19
20
RESET
Asynchronous Reset Input. Sets all DAC registers
to either zero-scale (000H) or mid-scale (800H)
when LOW. RESETSEL determines which code is
active.
RESETSEL
When LOW, a LOW on RESET will cause all DAC
registers to be set to code 000H. When RESETSEL
is HIGH, a LOW on RESET will set the registers to
code 800H.
®
4
DAC7614
BB [ BURR-BROWN CORPORATION ]
