PIN CONFIGURATION
Top View
CLK
A
0
A
1
SDI
SDO
DCOM
+V
CC
ACOM
1
2
3
4
DAC714
5
6
7
8
12 V
REF OUT
11 R
BPO
10 R
FB2
9
V
OUT
16 CLR
15 –V
CC
14 Gain Adjust
13 Offset Adjust
SOIC/DIP
PIN DESCRIPTIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LABEL
CLK
A
0
A
1
SDI
SDO
DCOM
+V
CC
ACOM
V
OUT
R
FB2
R
BPO
V
REF OUT
Offset Adjust
Gain Adjust
–V
CC
CLR
DESCRIPTION
Serial Data Clock
Enable for Input Register (Active Low)
Enable for D/A Latch (Active Low)
Serial Data Input
Serial Data Output
Digital Ground
Positive Power Supply
Analog Ground
D/A Output
±10V
Range Feedback Output
Bipolar Offset
Voltage Reference Output
Offset Adjust
Gain Adjust
Negative Power Supply
Clear
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from per-
formance degradation to complete device failure. Burr-
Brown Corporation recommends that all integrated circuits
be handled and stored using appropriate ESD protection
methods.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet
published specifications.
ABSOLUTE MAXIMUM RATINGS
(1)
+V
CC
to Common .................................................................... 0V to +17V
–V
CC
to Common .................................................................... 0V to –17V
+V
CC
to –V
CC
....................................................................................... 34V
ACOM to DCOM ...............................................................................
±0.5V
Digital Inputs to Common ............................................. –1V to (V
CC
–0.7V)
External Voltage Applied to BPO and Range Resistors .....................
±V
CC
V
REF OUT
......................................................... Indefinite Short to Common
V
OUT
............................................................... Indefinite Short to Common
SDO ............................................................... Indefinite Short to Common
Power Dissipation .......................................................................... 750mW
Storage Temperature ...................................................... –60°C to +150°C
Lead Temperature (soldering, 10s) ................................................ +300°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ORDERING INFORMATION
PRODUCT
DAC714P
DAC714U
DAC714HB
DAC714HC
DAC714HL
PACKAGE
Plastic DIP
Plastic SOIC
Ceramic DIP
Ceramic DIP
Ceramic DIP
LINEARITY ERROR
max at +25
°
C
±4
±4
±2
±1
±1
LSB
LSB
LSB
LSB
LSB
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
PACKAGE INFORMATION
PRODUCT
DAC714P
DAC714U
DAC714H
PACKAGE
Plastic DIP
Plastic SOIC
Ceramic DIP
PACKAGE DRAWING
NUMBER
(1)
180
211
129
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet,
or Appendix C of Burr-Brown IC Data Book.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
3
DAC714
BURR-BROWN [ BURR-BROWN CORPORATION ]
