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ADS831E 参数 Datasheet PDF下载

ADS831E图片预览
型号: ADS831E
PDF下载: 下载PDF文件 查看货源
内容描述: 8位, 80MHz的采样模拟数字转换器 [8-Bit, 80MHz Sampling ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器模数转换器光电二极管
文件页数/大小: 11 页 / 181 K
品牌: BB [ BURR-BROWN CORPORATION ]
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the resistive reference ladder. The bandgap reference circuit  
includes logic functions that allow to set the analog input  
swing of the ADS831 to either a 1Vp-p or 2Vp-p full-scale  
range simply by tying the RSEL pin to a LOW or HIGH  
potential, respectively. While operating the ADS831 in the  
external reference mode, the buffer amplifiers for REFT and  
REFB are disconnected from the reference ladder.  
The common-mode voltage available at the CM pin may be  
used as a bias voltage to provide the appropriate offset for  
the driving circuitry. However, care must be taken not to  
appreciably load this node, which is not buffered and has a  
high impedance. An alternative way of generating a com-  
mon-mode voltage is given in Figure 7. Here, two external  
precision resistors (1% tolerance or better) are located  
between the top and bottom reference pins. The common-  
mode voltage, CMV, will appear at the midpoint.  
As shown, the ADS831 has internal 50kpull-up resistors  
at the Range Select pin (RSEL) and Reference Select pin  
(INT/EXT). Leaving those pins open configures the ADS831  
for a 2Vp-p input range and external reference operation.  
Setting the ADS831 up for internal reference mode requires  
to bring the INT/EXT pin LOW.  
EXTERNAL REFERENCE OPERATION  
For even more design flexibility, the internal reference can  
be disabled and an external reference voltage be used. The  
utilization of an external reference may be considered for  
applications requiring higher accuracy, improved tempera-  
ture performance, or a wide adjustment range of the  
converter’s full-scale range. Especially in multichannel  
applications, the use of a common external reference has the  
benefit of obtaining better matching of the full-scale range  
between converters.  
The reference buffers can be utilized to supply up to 1mA  
(sink and source) to external circuitry. To ensure proper  
operation with any reference configurations, it is necessary  
to provide solid bypassing at the reference pins in order to  
keep the clock feedthrough to a minimum (Figure 6). All  
bypassing capacitors should be located as close to their  
respective pins as possible.  
The external references can vary as long as the value of the  
external top reference REFTEXT stays within the range of  
(VS – 1.25V) and (REFB + 0.8V), and the external bottom  
reference REFBEXT stays within 1.25V and (REFT – 0.8V),  
see Figure 8.  
ADS831  
REFT  
+3.0V  
REFB  
+2.0V  
The full-scale input signal range (FSR) of the ADS831 is  
determined by the voltage difference across the reference  
pins REFT and REFB (FSR = REFT – REFB), while the  
common-mode voltage is defined by CMV = (REFT +  
REFB)/2. In order to maintain good ac performance, it is  
recommended that the typical common-mode voltage be  
kept at +2.5V while setting the external reference voltages.  
It is possible, however, to deviate from this common-mode  
level without significantly impacting the performance. In  
particular, DC-coupled applications may benefit from a  
lower CMV as it increases the signal headroom of the  
R1  
1kΩ  
R2  
1kΩ  
+
+
2.2µF  
0.1µF  
0.1µF  
2.2µF  
CMV  
+2.5V  
FIGURE 7. Alternative Circuit to Generate Common-Mode  
Voltage.  
+5V  
B
A
A - Short for 1Vp-p Input Range  
B - Short for 2Vp-p Input Range (Default)  
+VS  
INT/EXT  
RSEL  
GND  
IN  
VIN  
ADS831  
CMV  
IN  
REFT  
GND  
REFB  
External Top Reference  
REFT = REFB +0.8V to +3.75V  
External Bottom Reference  
REFB = REFT –0.8V to +1.25V  
FIGURE 8. Configuration Example for External Reference Operation.  
®
10  
ADS831