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ADS825E/1K 参数 Datasheet PDF下载

ADS825E/1K图片预览
型号: ADS825E/1K
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 40MHz的采样模拟到数字转换器 [10-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTERS]
分类和应用: 转换器模数转换器光电二极管
文件页数/大小: 12 页 / 201 K
品牌: BURR-BROWN [ BURR-BROWN CORPORATION ]
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SPECIFICATIONS
(Cont.)
At T
A
= full specified temperature range, V
S
= +5V, single-ended input range = 1.5V to 3.5V, and sampling rate = 40MHz, external reference, unless otherwise noted.
ADS822E
PARAMETER
POWER SUPPLY REQUIREMENTS
Supply Voltage: +V
S
Supply Current: +I
S
Power Dissipation: VDRV = 5V
VDRV = 3V
VDRV = 5V
VDRV = 3V
Power Down
Thermal Resistance,
θ
JA
28-Lead SSOP
T
Indicates the same specifications as the ADS822E.
NOTES: (1) ADS825E accepts a +3V clock input. (2) Spurious Free Dynamic Range refers to the magnitude of the largest harmonic. (3) dBFS means dB relative to Full Scale. (4) Two-tone intermodulation
distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the two-tone fundamental envelope. (5) Effective number of bits (ENOB) is defined
by (SINAD – 1.76)/6.02. (6) A 50kΩ pull-down resistor is inserted internally on OE pin. (7) Includes internal reference. (8) Excludes internal reference.
CONDITIONS
MIN
TYP
MAX
MIN
ADS825E
(1)
TYP
MAX
UNITS
Operating
Operating (External Reference)
External Reference
External Reference
Internal Reference
Internal Reference
Operating
+4.75
+5.0
40
200
190
250
240
20
89
+5.25
230
T
T
T
T
T
T
T
T
T
T
T
V
mA
mW
mW
mW
mW
mW
°C/W
PIN CONFIGURATION
Top View
SSOP
PIN DESCRIPTIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
DESIGNATOR
GND
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
OE
DESCRIPTION
Ground
Data Bit 1 (D9) (MSB)
Data Bit 2 (D8)
Data Bit 3 (D7)
Data Bit 4 (D6)
Data Bit 5 (D5)
Data Bit 6 (D4)
Data Bit 7 (D3)
Data Bit 8 (D2)
Data Bit 9 (D1)
Data Bit 10 (D0) (LSB)
Output Enable. HI = high impedance state
LO = normal operation (internal pull-down
resistor)
Power Down. HI = enable; LO = disable
Convert Clock Input
+5V Supply
Ground
Input Range Select. HI = 2V; LO = 1V
Reference Select. HI = external, LO = internal
Bottom Reference
Bottom Ladder Bypass
Top Ladder Bypass
Top Reference
Common-Mode Voltage Output
Complementary Input (–)
Analog Input (+)
Analog Ground
+5V Supply
Output Logic Driver Supply Voltage
GND
Bit 1 (MSB)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
1
2
3
4
5
6
7
8
9
ADS822
ADS825
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDRV
+V
S
GND
IN
IN
CM
REFT
ByT
ByB
REFB
INT/EXT
RSEL
GND
+V
S
Bit 9 10
Bit 10 (LSB) 11
OE 12
PD 13
CLK 14
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
PD
CLK
+V
S
GND
RSEL
INT/EXT
REFB
ByB
ByT
REFT
CM
IN
IN
GND
+V
S
VDRV
®
3
ADS822, ADS825