REFERENCE
INTRODUCTION
Under normal operation, the REFOUT pin (pin 2) should be
directly connected to the REFIN pin (pin 1) to provide an
internal +2.5V reference to the ADS7864. The ADS7864
can operate, however, with an external reference in the range
of 1.2V to 2.6V for a corresponding full-scale range of 2.4V
to 5.2V.
The ADS7864 is a high speed, low power, dual 12-bit A/D
converter that operates from a single +5V supply. The input
channels are fully differential with a typical common-mode
rejection of 80dB. The part contains dual 2µs successive
approximation ADCs, six differential sample-and-hold am-
plifiers, an internal +2.5V reference with REFIN and REFOUT
pins and a high speed parallel interface. There are six analog
inputs that are grouped into three channels (A, B and C).
Each A/D converter has three inputs (A0/A1, B0/B1 and C0/
C1) that can be sampled and converted simultaneously, thus
preserving the relative phase information of the signals on
both analog inputs. Each pair of channels has a hold signal
(HOLDA, HOLDB, HOLDC) to allow simultaneous sam-
pling on all 6 channels. The part accepts an analog input
voltage in the range of –VREF to +VREF, centered around the
internal +2.5V reference. The part will also accept bipolar
input ranges when a level shift circuit is used at the front end
(see Figure 7).
The internal reference of the ADS7864 is double-buffered.
If the internal reference is used to drive an external load, a
buffer is provided between the reference and the load ap-
plied to pin 33 (the internal reference can typically source
2mA of current—load capacitance should not exceed 100pF).
If an external reference is used, the second buffer provides
isolation between the external reference and the CDAC.
This buffer is also used to recharge all of the capacitors of
both CDACs during conversion.
ANALOG INPUT
The analog input is bipolar and fully differential. There are
two general methods of driving the analog input of the
ADS7864: single-ended or differential (see Figures 1 and 2).
When the input is single-ended, the –IN input is held at the
common-mode voltage. The +IN input swings around the
same common voltage and the peak-to-peak amplitude is the
(common-mode +VREF) and the (common-mode –VREF).
The value of VREF determines the range over which the
common-mode voltage may vary (see Figure 3).
A conversion is initiated on the ADS7864 by bringing the
HOLDX pin LOW for a minimum of 15ns. HOLDX LOW
places both sample-and-hold amplifiers of the X channels in
the hold state simultaneously and the conversion process is
started on both channels. The BUSY output will then go
LOW and remain LOW for the duration of the conversion
cycle. The data can be read from the parallel output bus
following the conversion by bringing both RD and CS
LOW.
When the input is differential, the amplitude of the input is the
difference between the +IN and –IN input, or: (+IN) – (–IN).
The peak-to-peak amplitude of each input is ±1/2VREF around
this common voltage. However, since the inputs are 180° out
of phase, the peak-to-peak amplitude of the differential voltage
is +VREF to –VREF. The value of VREF also determines the
range of the voltage that may be common to both inputs (see
Figure 4).
Conversion time for the ADS7864 is 1.75µs when an 8MHz
external clock is used. The corresponding acquisition time is
0.25µs. To achieve maximum output rate (500kHz), the read
function can be performed during at the start of the next
conversion.
NOTE: This mode of operation is described in more detail
in the Timing and Control section of this data sheet.
SAMPLE-AND-HOLD SECTION
The sample-and-hold amplifiers on the ADS7864 allow the
ADCs to accurately convert an input sine wave of full-scale
amplitude to 12-bit accuracy. The input bandwidth of the
sample-and-hold is greater than the Nyquist rate (Nyquist
equals one-half of the sampling rate) of the ADC even when
the ADC is operated at its maximum throughput rate of
500kHz. The typical small-signal bandwidth of the sample-
and-hold amplifiers is 40MHz.
–VREF to +VREF
peak-to-peak
ADS7864
Common
Voltage
Single-Ended Input
VREF
peak-to-peak
Typical aperture delay time or the time it takes for the
ADS7864 to switch from the sample to the hold mode
following the negative edge of HOLDX signal is 5ns. The
average delta of repeated aperture delay values is typically
50ps (also known as aperture jitter). These specifications
reflect the ability of the ADS7864 to capture AC input
signals accurately at the exact same moment in time.
ADS7864
Common
VREF
Voltage
peak-to-peak
Differential Input
FIGURE 1. Methods of Driving the ADS7864 Single-Ended
or Differential.
®
ADS7864
8
BB [ BURR-BROWN CORPORATION ]
