PIN ASSIGNMENTS
PIN CONFIGURATION
PIN
1
NAME
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AGND
VREF
DESCRIPTION
Top View
TQFP
Analog Input Channel 0
Analog Input Channel 1
Analog Input Channel 2
Analog Input Channel 3
Analog Input Channel 4
Analog Input Channel 5
Analog Input Channel 6
Analog Input Channel 7
Analog Ground, GND = 0V
2
3
4
5
6
7
8
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10
Voltage Reference Input and Output. See
Specification Table for ranges. Decouple to
ground with a 0.1µF ceramic capacitor and
a 2.2µF tantalum capacitor.
ADS7852Y
11
12
DGND
A2
Digital Ground, GND = 0V
Channel Address. See Channel Selection
Table for details.
13
14
A1
A0
Channel Address. See Channel Selection
Table for details.
Channel Address. See Channel Selection
Table for details.
15
16
17
18
19
20
21
22
23
24
25
26
27
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
WR
Data Bit 11 (MSB)
Data Bit 10
Data Bit 9
Data Bit 8
Data Bit 7
Data Bit 6
Data Bit 5
Data Bit 4
Data Bit 3
ABSOLUTE MAXIMUM RATINGS(1)
Data Bit 2
Data Bit 1
Analog Inputs to AGND, Any Channel Input .............. –0.3V to (VD + 0.3V)
REFIN ......................................................................... –0.3V to (VD + 0.3V)
Digital Inputs to DGND .............................................. –0.3V to (VD + 0.3V)
Ground Voltage Differences: AGND, DGND..................................... ±0.3V
+VSS to AGND ..........................................................................–0.3V to 6V
Power Dissipation .......................................................................... 325mW
Maximum Junction Temperature ................................................... +150°C
Operating Temperature Range ......................................... –40°C to +85°C
Storage Temperature Range .......................................... –65°C to +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Data Bit 0 (LSB)
Write Input. Active LOW. Use to start a
new conversion and to select an analog
channel via address inputs A0, A1 and A2
in combination with CS.
28
29
30
BUSY
CLK
RD
BUSY output goes LOW and stays LOW
during a conversion. BUSY rises when a
conversion is complete.
External Clock Input. The clock speed
determines the conversion rate by the
equation: fCLK = 16 • fSAMPLE
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. Exposure to absolute maximum condi-
tions for extended periods may affect device reliability.
.
Read Input. Active LOW. Use to read the
data outputs in combination with CS. Also
use (in conjunction with A0 or A1) to place
device in power-down mode.
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from per-
formance degradation to complete device failure. Burr-
Brown Corporation recommends that all integrated circuits
be handled and stored using appropriate ESD protection
methods.
31
32
CS
Chip Select Input. Active LOW. The
combination of CS taken LOW and WR
taken LOW initiates a new conversion and
places the outputs in tri-state mode.
VSS
Voltage Supply Input. Nominally +5V.
Decouple to ground with a 0.1µF ceramic
capacitor and a 10µF tantalum capacitor.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet
published specifications.
®
3
ADS7852