PIN DEFINITIONS
PIN NO
NAME
TYPE(1)
DESCRIPTION
PIN NO
NAME
TYPE(1)
DESCRIPTION
35
36
37
SOUT1
CLK
CONV
DO
DI
DI
Serial Digital Output, Channel 1
Clock for A/D Converters
Start A/D Converters. When CONV goes to
“0” (low) the next rising edge of CLK
starts the conversion.
1
V3–4N
AI
Voltage Input, Channel 3, Mux I/P 4,
Negative Side
2
3
4
5
6
V3–4P
V3–3N
V3–3P
V3–2N
V3–2P
AI
AI
AI
AI
AI
Voltage Input, Channel 3, Mux IP 4,
Positive Side
Voltage Input, Channel 3, Mux I/P 3,
Negative Side
38
ASH
DI
Digital Control for Asynchronous Sample
Hold. If signal is “1” (high), signals
are sampled.
Voltage Input, Channel 3, Mux I/P 3,
Positive Side
39
40
SERIN
BUSY
DI
DO
Serial Digital Input for Input Control Word
A/D Converters Busy. Busy if signal
is “0” (low).
Voltage Input, Channel 3, Mux I/P 2,
Negative Side
Voltage Input, Channel 3, Mux I/P 2,
Positive Side
41
DCLOCK
DO
A Delayed and Truncated Version of
the CLK Signals. It is Delayed 50ns
from the CLK Signal and Stays Low
after 13 DCLOCK Cycles.
7
8
NC
V3–1N
—
AI
No Connection
Voltage Input, Channel 3, Mux I/P 1,
Negative Side
42
43
44
45
46
47
48
49
50
51
52
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
V1–3P
—
—
—
—
—
—
—
—
—
—
AI
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
9
V3–1P
AI
Voltage Input, Channel 3, Mux I/P 1,
Positive Side
10
11
NC
V2–1N
—
AI
No Connection
Voltage Input, Channel 2, Mux I/P 1,
Negative Side
12
V2–1P
AI
Voltage Input, Channel 2, Mux I/P 1,
Positive Side
13
14
NC
V2–2N
—
AI
No Connection
Voltage Input, Channel 2, Mux I/P 2,
Negative Side
No Connection
Voltage Input, Channel 1, Mux I/P 3,
Positive Side
15
V2–2P
AI
Voltage Input, Channel 2, Mux I/P 2,
Positive Side
53
V1–3N
AI
Voltage Input, Channel 1, Mux I/P 3,
Negative Side
16
17
NC
V2–3N
—
AI
No Connection
Voltage Input, Channel 2, Mux I/P 3,
Negative Side.
54
55
NC
V1–2P
—
AI
No Connection
Voltage Input, Channel 1, Mux I/P 2,
Positive Side
18
V2–3P
AI
Voltage Input, Channel 2, Mux I/P 3,
Positive Side
56
V1–2N
AI
Voltage Input, Channel 1, Mux I/P 2,
Negative Side
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
NC
NC
NC
NC
NC
NC
NC
NC
TP1
TP2
VDIG+
DGND
VDIG–
NC
—
—
—
—
—
—
—
—
—
—
P
P
P
—
DO
DO
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
57
58
NC
V1–1P
—
AI
No Connection
Voltage Input, Channel 1, Mux I/P 1,
Positive Side
59
V1–1N
AI
Voltage Input, Channel 1, Mux I/P 1,
Negative Side
60
61
62
63
64
65
66
67
68
NC
NC
AOUT
—
—
AO
AO
AI
P
P
P
P
No Connection
No Connection
Output of DAC
Test Point 1, Make No Connection
Test Point 2, Make No Connection
Digital Supply Voltage, +5V
Digital Supply Voltage, Ground
Digital Supply Voltage, –5V
No Connection
CAP
Decoupling Point for Internal Reference
Input Pin for External Reference
Ground Pin for External Reference
Analog Supply Voltage, –5V
Analog Supply Voltage, Ground
Analog Supply Voltage, +5V
REFIN
REFGND
VANA–
AGND
VANA+
SOUT2
SOUT3
Serial Digital Output, Channel 2
Serial Digital Output, Channel 3
NOTE: (1) AI is Analog Input, AO is Analog Output, DI is Digital Input, DO is Digital Output, P is Power Supply Connection.
®
ADS7833
4
BB [ BURR-BROWN CORPORATION ]
