SPECIFICATIONS
At –40°C to +85°C, +VCC = +2.7V, VREF = +2.5V, fSAMPLE = 75kHz, fCLK = 16 • fSAMPLE, unless otherwise specified.
ADS7822
TYP
ADS7822B
TYP
ADS7822C
TYP
PARAMETER
CONDITIONS
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
ANALOG INPUT
Full-Scale Input Span
Absolute Input Range
+In – (–In)
+In
0
–0.2
–0.2
VREF
VCC +0.2
+1.0
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
V
–In
Capacitance
Leakage Current
25
±1
✻
✻
✻
✻
pF
µA
SYSTEM PERFORMANCE
Resolution
No Missing Codes
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Noise
Power Supply Rejection
12
✻
✻
Bits
Bits
11
12
✻
±0.5
±0.5
±2
±2
±3
±3
±0.5
±0.5
±1
±1
✻
±0.25
±0.25
±0.75
±0.75
±1
LSB(1)
LSB
LSB
LSB
µVrms
dB
✻
±1
33
82
✻
✻
✻
✻
SAMPLING DYNAMICS
Conversion Time
Acquisition Time
12
75
✻
✻
✻
✻
Clk Cycles
Clk Cycles
kHz
1.5
✻
✻
✻
✻
Throughput Rate
DYNAMIC CHARACTERISTICS
Total Harmonic Distortion
SINAD
VIN = 2.5Vp-p at 1kHz
VIN = 2.5Vp-p at 1kHz
VIN = 2.5Vp-p at 1kHz
–82
71
86
✻
✻
✻
✻
✻
✻
dB
dB
dB
Spurious Free Dynamic Range
REFERENCE INPUT
Voltage Range
Resistance
0.05
VCC
✻
✻
V
CS = GND, fSAMPLE = 0Hz
CS = VCC
5
5
8
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
GΩ
GΩ
µA
µA
µA
Current Drain
At Code 710h
fSAMPLE = 7.5kHz
CS = VCC
40
3
✻
✻
✻
✻
0.8
0.001
DIGITAL INPUT/OUTPUT
Logic Family
Logic Levels:
VIH
VIL
VOH
CMOS
✻
✻
IIH = +5µA
IIL = +5µA
IOH = –250µA
IOL = 250µA
2.0
–0.3
2.1
5.5
0.8
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
V
V
VOL
0.4
✻
✻
Data Format
Straight Binary
✻
✻
POWER SUPPLY REQUIREMENTS
VCC
Specified Performance
See Notes 2 and 3
See Note 3
2.7
2.0
3.6
3.6
2.7
5.25
325
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
V
µA
µA
µA
Quiescent Current
200
20
180
✻
✻
✻
✻
✻
✻
fSAMPLE = 7.5kHz(4,5)
fSAMPLE = 7.5kHz(5)
Power Down
CS = VCC
3
✻
✻
✻
✻
µA
TEMPERATURE RANGE
Specified Performance
–40
+85
✻
✻
°C
✻ Specifications same as ADS7822.
Notes: (1) LSB means Least Significant Bit. With VREF equal to +2.5V, one LSB is 0.61mV. (2) The maximum clock rate of the ADS7822 is less than 1.2MHz in this
power supply range. (3) See the Typical Performance Curves for more information. (4) fCLK = 1.2MHz, CS = VCC for 145 clock cycles out of every 160. (5) See the
Power Dissipation section for more information regarding lower sample rates.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
ADS7822
2