SPECIFICATIONS
At –40°C to +85°C, +VCC = +5V, VREF = +2.5V, fSAMPLE = 200kHz, fCLK = 16 • fSAMPLE, –In = +2.5V, unless otherwise specified.
ADS7817
TYP
ADS7817B
TYP
ADS7817C
TYP
PARAMETER
CONDITIONS
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
ANALOG INPUT
Full-Scale Input Span
Absolute Input Voltage
+In – (–In)
+In
–VREF
–0.3
–0.3
+VREF
VCC +0.3
4
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
V
–In
Capacitance
Leakage Current
15
±1
✻
✻
✻
✻
pF
µA
SYSTEM PERFORMANCE
Resolution
No Missing Codes
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Noise
Common-Mode Rejection
Power Supply Rejection
12
✻
✻
Bits
Bits
11
12
✻
±1
±1
±1
±0.5
63
80
±2
±2
±6
±4
±0.8
±0.7
✻
✻
✻
±2
±1
✻
±0.5
±0.4
✻
✻
✻
±1
±1
✻
LSB(1)
LSB
LSB
LSB
µVrms
dB
✻
✻
✻
✻
✻
✻
82
dB
SAMPLING DYNAMICS
Conversion Time
Acquisition Time
12
✻
✻
✻
✻
Clk Cycles
Clk Cycles
kHz
1.5
✻
✻
Throughput Rate
200
DYNAMIC CHARACTERISTICS
Total Harmonic Distortion
VIN = 5.0Vp-p at 1kHz
VIN = 5.0Vp-p at 5kHz
VIN = 5.0Vp-p at 1kHz
VIN = 5.0Vp-p at 1kHz
–83
–81
71
✻
✻
✻
✻
✻
✻
✻
✻
dB
dB
dB
dB
SINAD
Spurious Free Dynamic Range
86
REFERENCE INPUT
Voltage Range
Resistance
0.1
2.5
✻
✻
✻
✻
V
CS = VCC
CS = GND, fSAMPLE = 0Hz
At Code FF8h
5
5
20
1.3
0.001
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
GΩ
GΩ
µA
µA
µA
Current Drain
100
20
3
✻
✻
✻
✻
✻
✻
fSAMPLE = 12.5kHz
CS = VCC
DIGITAL INPUT/OUTPUT
Logic Family
Logic Levels:
VIH
VIL
VOH
CMOS
✻
✻
IIH = +5µA
IIL = +5µA
IOH = –250µA
IOL = 250µA
3
–0.3
3.5
+VCC +0.
0.8
3
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
V
V
VOL
Data Format
0.4
✻
✻
✻
✻
Binary Two’s Complement
POWER SUPPLY REQUIREMENTS
VCC
Specified Performance
4.75
5.25
800
✻
✻
✻
✻
✻
✻
V
Quiescent Current
460
40
330
✻
✻
✻
✻
✻
✻
µA
µA
µA
µA
fSAMPLE = 12.5kHz(2, 3)
fSAMPLE = 12.5kHz(3)
CS =VCC, fSAMPLE = 0Hz
Power Down
3
✻
✻
✻
✻
TEMPERATURE RANGE
Specified Performance
–40
+85
✻
✻
°C
✻ Specifications same as ADS7817.
NOTE: (1) LSB means Least Significant Bit, with VREF equal to +2.5V, one LSB is 1.22mV. (2) fCLK = 3.2MHz, CS = VCC for 241 clock cycles out of every 256.
(3) See the Power Dissipation section for more information regarding lower sample rates.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
ADS7817
2
BB [ BURR-BROWN CORPORATION ]
