is placed on these outputs. In the circuit shown in Figure 1,
the rising edge of BUSY latches the result into the 74HC574s.
BASIC OPERATION
Figure 1 shows the recommended circuit for operation of the
ADS7811. A falling edge on the convert pulse signal places
the sample and hold into the hold mode and initiates a
conversion. When the conversion is complete, the pins D15
through D0 become active and the result of the conversion
After the conversion is complete, the ADS7811 sample and
hold returns to the sample mode and begins acquiring the
input signal for the next conversion. Allowing 4µs between
falling edges of the convert pulse signal assures adequate
acquisition time for the internal sample and hold.
R1
75Ω
+5V
R2
OPA628
10Ω
+5V
+
1
2
3
4
5
6
7
8
9
VIN
+VS 28
+VS 27
BUSY 26
CS 25
R/C 24
–VS 23
D0 22
D1 21
D2 20
D3 19
D4 18
D5 17
D6 16
D7 15
0.1µF
C1
10µF
C2
–5V
GND
REF
CAP
GND
D15
D14
+
+
2.2µF
C3
0.1µF
C5
Convert Pulse
2.2µF
C4
0.1µF
C6
74HC00
10µF
–5V
100ns min
3.3µs max
0.1µF
C7
C8
+
ADS7811
D13
OC
1
D12
OC
10
10 D11
11 D10
12 D9
CLK
2
3
4
5
6
7
8
9
1D
2D
3D
4D
5D
6D
7D
8D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
13 D8
µProcessor
14 GND
Bus
74HC574
1
OC
10
CLK
2
3
4
5
6
7
8
9
1D
2D
3D
4D
5D
6D
7D
8D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
µProcessor
Bus
74HC574
FIGURE 1. Basic Operation.
®
6
ADS7811
BB [ BURR-BROWN CORPORATION ]
