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ADS7807UB/1K 参数 Datasheet PDF下载

ADS7807UB/1K图片预览
型号: ADS7807UB/1K
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗, 16位采样CMOS模拟数字转换器 [Low-Power, 16-Bit, Sampling CMOS ANALOG-to-DIGITAL CONVERTER]
分类和应用: 转换器模数转换器光电二极管
文件页数/大小: 24 页 / 527 K
品牌: BB [ BURR-BROWN CORPORATION ]
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DSP56000 INTERFACING  
similar to the QSPI interface seen in Figure 14. As mentioned  
in the QSPI section, the DSP56000 must be programmed to  
enable the interface when a LOW to HIGH transition on SC1  
is observed (BUSY going HIGH at the end of conversion).  
The DSP56000 serial interface has SPI compatibility mode  
with some enhancements. Figure 16 shows an interface  
between the ADS7807 and the DSP56000 which is very  
The DSP56000 can also provide the convert pulse by includ-  
ing a monostable multi-vibrator, as seen in Figure 17. The  
receive and transmit sections of the interface are decoupled  
(asynchronous mode) and the transmit section is set to  
generate a word length frame sync every other transmit  
frame (frame rate divider set to 2). The prescale modulus  
should be set to 3.  
Convert Pulse  
DSP56000  
ADS7807  
R/C  
The monostable multi-vibrator in this circuit will provide  
varying pulse widths for the convert pulse. The pulse width  
will be determined by the external R and C values used with  
the multi-vibrator. The 74HCT123N data sheet shows that  
the pulse width is (0.7) RC. Choosing a pulse width as close  
to the minimum value specified in this data sheet will offer the  
best performance. See the Starting A Conversion section of  
this data sheet for details on the conversion pulse width.  
SC1  
BUSY  
SRD  
SCO  
SDATA  
DATACLK  
CS  
EXT/INT  
BYTE  
The maximum conversion rate for a 20.48MHz DSP56000 is  
exactly 40kHz. Note that this will not be the case for the  
ADS7806. See the ADS7806 data sheet (SBAS021B) for  
more information.  
SYN = 0 (Asychronous)  
GCK = 1 (Gated clock)  
SCD1 = 0 (SC1 is an input)  
SHFD = 0 (Shift MSB first)  
WL1 = 1 WL0 = 0 (Word length = 16 bits)  
FIGURE 16. DSP56000 Interface to the ADS7807.  
74HCT123N  
+5V  
+5V  
DSP56000  
R
B1  
REXT1  
CEXT1  
Q1  
C
ADS7807  
SC2  
CLR1  
A1  
R/C  
SC0  
SRD  
DATACLK  
SDATA  
CS  
EXT/INT  
BYTE  
SYN = 0 (Asychronous)  
GCK = 1 (Gated clock)  
SCD2 = 1 (SC2 is an output)  
SHFD = 0 (Shift MSB first)  
WL1 = 1 WL0 = 0 (Word length = 16 bits)  
FIGURE 17. DSP56000 Interface to the ADS7807. Processor Initiates Conversions.  
ADS7807  
SBAS022C  
19  
www.ti.com  
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