ELECTRICAL CHARACTERISTICS
(Cont.)
At T
A
= –40°C to +85°C, f
S
= 40kHz, V
DIG
= V
ANA
= +5V, and using internal reference and fixed resistors (see Figure 7b), unless otherwise specified.
ADS7807P, U
PARAMETER
AC ACCURACY
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise + Distortion)
Signal-to-Noise
Usable Bandwidth
(7)
Full-Power Bandwidth (–3dB)
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Over-Voltage Recovery
(8)
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
(Must use external buffer.)
Internal Reference Drift
External Reference Voltage Range
for Specified Linearity
External Reference Current Drain
DIGITAL INPUTS
Logic Levels
V
IL
V
IH(9)
I
IL
I
IH
DIGITAL OUTPUTS
Data Format
Data Coding
V
OL
V
OH
Leakage Current
Output Capacitance
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
POWER SUPPLIES
Specified Performance
V
DIG
V
ANA
I
DIG
I
ANA
Power Dissipation
CONDITIONS
f
IN
= 1kHz,
±10V
f
IN
= 1kHz,
±10V
f
IN
= 1kHz,
±10V
–60dB Input
f
IN
= 1kHz,
±10V
MIN
90
83
83
TYP
100
–100
88
30
88
130
600
MAX
MIN
96
–90
86
86
ADS7807PB, UB
TYP
✻
✻
✻
32
✻
✻
✻
✻
✻
5
750
✻
✻
✻
✻
✻
✻
✻
✻
MAX
UNITS
dB
(6)
dB
dB
dB
dB
kHz
kHz
–96
40
20
FS Step
ns
ps
µs
ns
No Load
2.48
2.5
1
8
2.5
2.52
V
µA
ppm/°C
V
µA
2.3
External 2.5000V Ref
2.7
100
✻
✻
✻
–0.3
+2.0
V
IL
= 0V
V
IH
= 5V
+0.8
V
D
+ 0.3V
±10
±10
✻
✻
✻
✻
✻
✻
V
V
µA
µA
Parallel 16 bits in 2-bytes; Serial
Binary Two’s Complement or Straight Binary
I
SINK
= 1.6mA
I
SOURCE
= 500µA
High-Z State,
V
OUT
= 0V to V
DIG
High-Z State
+0.4
+4
±5
15
✻
✻
✻
✻
✻
✻
V
V
µA
pF
R
L
= 3.3kΩ, C
L
= 50pF
R
L
= 3.3kΩ, C
L
= 10pF
83
83
ns
ns
Must be
≤
V
ANA
+4.75
+4.75
V
ANA
= V
DIG
= 5V, f
S
= 40kHz
REFD HIGH
PWRD and REFD HIGH
–40
–55
–65
+5
+5
0.6
5.0
28
23
50
+5.25
+5.25
✻
✻
35
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
mA
mA
mW
mW
µW
°C
°C
°C
°C/W
°C/W
TEMPERATURE RANGE
Specified Performance
Derated Performance
Storage
Thermal Resistance (
θ
JA
)
DIP
SO
✻
Same specifications as ADS7807P, U.
+85
+125
+150
75
75
✻
✻
✻
✻
✻
✻
✻
✻
NOTES: (1) LSB means Least Significant Bit. One LSB for the
±10V
input range is 305µV. (2) Typical rms noise at worst-case transition. (3) As measured with
fixed resistors, see Figure 7b. Adjustable to zero with external potentiometer. (4) Full-scale error is the worst case of –Full-Scale or +Full-Scale untrimmed deviation
from ideal first and last code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. (5) This is the
time delay after the ADS7807 is brought out of Power-Down mode until all internal settling occurs and the analog input is acquired to rated accuracy. A Convert
command after this delay will yield accurate results. (6) All specifications in dB are referred to a full-scale input. (7) Usable bandwidth defined as full-scale input
frequency at which Signal-to-(Noise + Distortion) degrades to 60dB. (8) Recovers to specified performance after 2 • FS input overvoltage. (9) The minimum V
IH
level for the DATACLK signal is 3V.
ADS7807
SBAS022C
www.ti.com
3