ADS5510
www.ti.com
SLAS499–JANUARY 2007
ELECTRICAL CHARACTERISTICS
Typical values given at TA = 25°C, min and max specified over the full recommended operating temperature range, AVDD
=
DRVDD = 3.3 V, sampling rate = 125 MSPS, 50% clock duty cycle, DLL On, 3-VPP differential clock, and –1 dBFS differential
input, unless otherwise noted
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
11
bits
Analog Inputs
Differential input range
2.3
6.6
4
VPP
kΩ
pF
Differential input impedance
Differential input capacitance
See Figure 24
See Figure 24
Analog input common-mode current
(per input)
300
750
4
µA
Analog input bandwidth
Source impedance = 50 Ω
MHz
Clock
cycles
Voltage overload recovery time
Internal Reference Voltages
V(REFM)
V(REFP)
Reference bottom voltage
Reference top voltage
Reference error
0.95
2.1
V
V
–4%
±0.9%
4%
1.55
±0.05
VCM
Common-mode voltage output
V
Dynamic DC Characteristics and Accuracy
No missing codes
Tested
±0.25
±0.8
DNL
INL
Differential nonlinearity error
Integral nonlinearity error
Offset error
fIN = 10 MHz
fIN = 10 MHz
-0.5
-1.5
-11
0.5
1.5
LSB
LSB
+2.5
+11
mV
Offset temperature coefficient
0.01
mV/°C
∆offset error/∆AVDD from AVDD = 3 V to
AVDD = 3.6 V
PSRR
DC power-supply rejection ratio
0.25
mV/V
(1)
Gain error
-2
±0.45
+2
%FS
Gain temperature coefficient
0.01
∆%/°C
Dynamic AC Characteristics
fIN = 10 MHz
fIN = 70 MHz
fIN = 100 MHz
fIN = 130 MHz
fIN = 170 MHz
fIN = 10 MHz
fIN = 70 MHz
fIN = 100 MHz
fIN = 130 MHz
fIN = 170 MHz
fIN = 10 MHz
fIN = 70 MHz
fIN = 100 MHz
fIN = 130 MHz
fIN = 170 MHz
62.5
66.7
66.5
66.3
66
SNR
SFDR
HD2
Signal-to-noise ratio
dBFS
dBc
65.5
84
73
73
81
Spurious-free dynamic range
82
78
72
91
87
Second-harmonic
84
dBc
79
74
(1) Gain error is specified by design and characterization; it is not tested in production.
3
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