MINIMIZING POWER DISSIPATION
REDUCED REFERENCE
OPERATION
In systems that have significant time between conversions,
the lowest power drain will occur with the minimum CS
LOW time. Bringing CS LOW, transferring data as quickly
as possible, and then bringing it back HIGH will result in the
lowest current drain. This minimizes the amount of time the
device draws power. After a conversion the A/D automati-
cally shuts down even if CS is held LOW. If the clock is left
running to clock out LSB-data or zero, the logic will draw a
small amount of current (see Figure 3).
The effective resolution of the ADS1286 can be increased
by reducing the input span of the converter. The ADS1286
exhibits good linearity and gain over a wide range of
reference voltages (see Typical Performance Curves “ Change
in Linearity vs Reference Voltage” and “Change in Gain vs
Reference Voltage”). However, care must be taken when
operating at low values of VREF because of the reduced LSB
size and the resulting higher accuracy requirement placed on
the converter. The following factors must be considered
when operating at low VREF values:
6.00
TA = 25°C
VCC = +5V
1. Offset
2. Noise
5.00
V
REF = +5V
f
CLK = 16 • fSAMPLE
4.00
3.00
2.00
1.00
0.00
OFFSET WITH REDUCED VREF
CS = LOW
(GND)
The offset of the ADS1286 has a larger effect on the output
code. When the ADC is operated with reduced reference
voltage. The offset (which is typically a fixed voltage)
becomes a larger fraction of an LSB as the size of the LSB
is reduced. The Typical Performance Curve “Change in
Offset vs Reference Voltage” shows how offset in LSBs is
related to reference voltage for a typical value of VOS. For
example, a VOS of 122µV which is 0.1 LSB with a 5V
reference becomes 0.5LSB with a 1V reference and 2.5LSBs
with a 0.2V reference. If this offset is unacceptable, it can be
corrected digitally by the receiving system or by offsetting
the negative input of the ADS1286.
CS HIGH
(VCC
)
0.1
1
10
100
Sample Rate (kHz)
FIGURE 3. Shutdown Current with CS HIGH is Lower than
with CS LOW.
RC INPUT FILTERING
It is possible to filter the inputs with an RC network as
shown in Figure 4. For large values of CFILTER (e.g., 1µF),
the capacitive input switching currents are averaged into a
net DC current. Therefore, a filter should be chosen with a
small resistor and large capacitor to prevent DC drops across
the resistor. The magnitude of the DC current is approxi-
mately IDC = 20pF x VIN/tCYC and is roughly proportional to
VIN. When running at the minimum cycle time of 64µs, the
input current equals 1.56µA at VIN = 5V. In this case, a filter
resistor of 75Ω will cause 0.1LSB of full-scale error. If a
larger filter resistor must be used, errors can be eliminated
by increasing the cycle time.
NOISE WITH REDUCED VREF
The total input referred noise of the ADS1286 can be
reduced to approximately 200µV peak-to-peak using a ground
plane, good bypassing, good layout techniques and minimiz-
ing noise on the reference inputs. This noise is insignificant
with a 5V reference but will become a larger fraction of an
LSB as the size of the LSB is reduced.
For operation with a 5V reference, the 200µV noise is only
0.15LSB peak-to-peak. In this case, the ADS1286 noise will
contribute virtually no uncertainty to the output code. How-
ever, for reduced references, the noise may become a signifi-
cant fraction of an LSB and cause undesirable jitter in the
output code. For example, with a 2.5V reference this same
200µV noise is 0.3LSB peak-to-peak. If the reference is
further reduced to 1V, the 200µV noise becomes equal to
0.8LSBs and a stable code may be difficult to achieve. In
this case averaging multiple readings may be necessary.
IDC
RFILTER
VIN
ADS1286
CFILTER
FIGURE 4. RC Input Filtering.
®
ADS1286
10
BB [ BURR-BROWN CORPORATION ]
