Four-Wire Interface
Figure 30 shows a four-wire interface with a 8xC32 micro-
processor. Again, the Slave Mode is being used.
Note that the XIN input can also be controlled. It is possible
with some microcontrollers and digital signal processors to
produce a continuous serial clock, which could be connected
to the XIN input. The frequency of the clock is often settable
over some range. Thus, the power dissipation of the
ADS1212/13 could be dynamically varied by changing both
the Turbo Mode and XIN input, trading off conversion speed
and resolution for power consumption.
Multi-Wire Interface
Figures 31 and 32 show multi-wire interfaces with a 8xC51
or 68HC11 microprocessor. In these interfaces, the mode of
the ADS1212/13 is actually controlled dynamically. This
could be extremely useful when the ADS1212/13 is to be
used in a wide variety of ways. For example, it might be
desirable to have the ADS1212/13 produce data at a steady
rate and to have the converter operating in the Continuous
Read Mode. But for system calibration, the Slave Mode
might be preferred because multiple instructions can be
issued per conversion period.
I/O Recovery
If serial communication stops during an instruction or data
transfer for longer than 4 • tDATA, the ADS1212/13 will reset
its serial interface. This will not affect the internal registers.
The main controller must not continue the transfer after this
event, but must restart the transfer from the beginning.
Note that the MODE input should not be changed in the
middle of a serial transfer. This could result in misoperation
of the device. A Master/Slave Mode change will not affect
the output data.
This feature is very useful if the main controller can be reset
at any point. After reset, simply wait 8 • tDATA before
starting serial communication.
P1.0
8xC32
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RESET
RXD
TXD
INT0
INT1
AVDD
A
INP
REFIN
REFOUT
AVDD
1.0µF
AGND
AIN
N
AGND
VBIAS
CS
MODE
DRDY
SDOUT
SDIO
AGND
DGND
DVDD
ADS1212
DSYNC
XIN
XOUT
DGND
SCLK
R1
10kΩ
DVDD
DVDD
WR
C1
27pF
RD
X2
X1
DGND
Q
D
Q
Q
D
VSS
XTAL
C2
27pF
Q
CLK
CLK
1/2 74HC74
1/2 74HC74
FIGURE 30. Four-Wire Interface with a 8xC32 Microprocessor.
AVDD
AIN
P
N
REFIN
REFOUT
AVDD
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
VCC
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
8xC51
1.0µF
AGND
AIN
AGND
VBIAS
CS
MODE
DRDY
SDOUT
SDIO
AGND
ADS1212
C1
6pF
DSYNC
XIN
XTAL
XOUT
DGND
SCLK
R1
10kΩ
R2
10kΩ
DVDD
DVDD
C2
6pF
DGND
DGND
FIGURE 31. Full Interface with a 8xC51 Microprocessor.
ADS1212, 1213
32
SBAS064A