Offset Calibration Register (OCR)
The actual FCR value will change from part-to-part and
with configuration, temperature, and power supply. Thus,
the actual FCR value for any arbitrary situation cannot be
accurately predicted. That is, a given system full-scale error
cannot be corrected simply by measuring the error exter-
nally, computing a correction factor, and writing that value
to the FCR. In addition, be aware that the contents of the
FCR are not used to directly correct the conversion result.
Rather, the correction is a function of the FCR value. This
function is linear and two known points can be used as a
basis for interpolating intermediate values for the FCR.
Consult the Calibration section for more details. The con-
tents of the FCR are in unsigned binary format. This is not
affected by the DF bit in the Command Register.
The OCR is a 24-bit register which contains the offset
correction factor that is applied to the conversion result before
it is placed in the Data Output Register (see Table XIII). In
most applications, the contents of this register will be the
result of either a self-calibration or a system calibration.
The OCR is both readable and writeable via the serial
interface. For applications requiring a more accurate offset
calibration, multiple calibrations can be performed, each
resulting OCR value read, the results averaged, and a more
precise offset calibration value written back to the OCR.
The actual OCR value will change from part-to-part and
with configuration, temperature, and power supply. Thus,
the actual OCR value for any arbitrary situation cannot be
accurately predicted. That is, a given system offset could not
be corrected simply by measuring the error externally, com-
puting a correction factor, and writing that value to the OCR.
In addition, be aware that the contents of the OCR are not
used to directly correct the conversion result. Rather, the
correction is a function of the OCR value. This function is
linear and two known points can be used as a basis for
interpolating intermediate values for the OCR. Consult the
Calibration section for more details.
TIMING
Table XV and Figures 13 through 21 define the basic digital
timing characteristics of the ADS1212/13. Figure 13 and the
associated timing symbols apply to the XIN input signal.
Figures 14 through 20 and associated timing symbols apply
to the serial interface signals (SCLK, SDIO, SDOUT, and
CS) and their relationship to DRDY. The serial interface is
discussed in detail in the Serial Interface section. Figure 21
and the associated timing symbols apply to the maximum
DRDY rise and fall times.
Most Significant Bit
Byte 2
OCR23
OCR15
OCR7
OCR22 OCR21 OCR20 OCR19 OCR18 OCR17 OCR16
Byte 1
tXIN
OCR14 OCR13 OCR12 OCR11 OCR10
Byte 0 Least Significant Bit
OCR4 OCR2 OCR1 OCR0
OCR9
OCR8
t2
t3
OCR6
OCR5
OCR3
XIN
TABLE XIII. Offset Calibration Register.
The contents of the OCR are in Two’s Complement format.
This is not affected by the DF bit in the Command Register.
FIGURE 13. XIN Clock Timing.
t4
Full-Scale Calibration Register (FCR)
t5
t6
t8
The FCR is a 24-bit register which contains the full-scale
correction factor that is applied to the conversion result before
it is placed in the Data Output Register (see Table XIV). In
most applications, the contents of this register will be the
result of either a self-calibration or a system calibration.
SCLK
(Internal)
t7
t9
SDIO
(as input)
SDOUT
(or SDlO
as output)
Most Significant Bit
Byte 2
FSR23
FSR15
FSR7
FSR22
FSR14
FSR6
FSR21
FSR13
FSR5
FSR20 FSR19 FSR18
Byte 1
FSR17 FSR16
FIGURE 14. Serial Input/Output Timing, Master Mode.
FSR12 FSR11 FSR10
FSR9
FSR8
Byte 0
FSR4
Least Significant Bit
FSR2 FSR1 FSR0
FSR3
t10
t11
t12
t14
TABLE XIV. Full-Scale Calibration Register.
SCLK
(External)
t13
t15
The FCR is both readable and writable via the serial inter-
face. For applications requiring a more accurate full-scale
calibration, multiple calibrations can be performed, each
resulting FCR value read, the results averaged, and a more
precise calibration value written back to the FCR.
SDIO
(as input)
SDOUT
(or SDlO
as output)
FIGURE 15. Serial Input/Output Timing, Slave Mode.
ADS1212, 1213
22
SBAS064A