ADS1208
www.ti.com
SBAS348A–MARCH 2005–REVISED MARCH 2005
tC 1
Internal
MCLK
tW 1
Internal
1
0
1
1
0
0
MDATA
MDATA
Figure 3. Mode 2 Operation
TIMING CHARACTERISTICS: MODE 2
Over recommended operating free-air temperature range at –40°C to +85°C, and AVDD = +5V, BVDD = +2.7 to +5.5V, unless
otherwise noted.
PARAMETER
MIN
83
MAX
125
UNIT
ns
tC1
Clock period
tW1
Clock high time
(tC1 /2) – 5
(tC1 /2) + 5
ns
tC 4
M CLK
tW 4
tD 4
M CLK
M DAT
note:
MCLK is system clock input. MCLK is modulator clock output. Modulator clock frequency is half of system clock
frequency.
Figure 4. Mode 3 Operation
TIMING CHARACTERISTICS: MODE 3
Over recommended operating free-air temperature range at –40°C to +85°C, and AVDD = +5V, BVDD = +2.7 to +5.5V, unless
otherwise noted.
PARAMETER
MIN
41
10
0
MAX
1000
tC4 – 10
10
UNIT
ns
tC4
tW4
tD4
tR
Clock period
Clock high time
ns
Data and output clock delay after falling edge of input clock
Rise time of clock (10% to 90% of BVDD
Fall time of clock (90% to 10% of BVDD
ns
)
0
10
ns
tF
)
0
10
ns
6