INPUT SIGNAL
ZERO
DATA RATE
NEGATIVE FULL-SCALE
–1LSB
+1LSB
POSITIVE FULL-SCALE
8SPS
16SPS
32SPS
128SPS
8000H
C000H
E000H
F800H
FFFFH
FFFFH
FFFFH
FFFFH
0000H
0000H
0000H
0000H
0001H
0001H
0001H
0001H
7FFFH
3FFFH
1FFFH
07FFH
TABLE II. Output Codes for Different Input Signals.
CLOCK GENERATOR
When designing an input filter circuit, remember to take into
account the interaction between the filter network and the
input impedance of the ADS1100.
The ADS1100 features an onboard clock generator, which
drives the operation of the modulator and digital filter. The
Typical Characteristics show varieties in data rate over
supply voltage and temperature.
USING THE ADS1100
OPERATING MODES
It is not possible to operate the ADS1100 with an external
modulator clock.
The ADS1100 operates in one of two modes: continuous
conversion and single conversion.
INPUT IMPEDANCE
In continuous conversion mode, the ADS1100 continuously
performs conversions. Once a conversion has been com-
pleted, the ADS1100 places the result in the output register,
and immediately begins another conversion. When the
ADS1100 is in continuous conversion mode, the ST/BSY bit
in the configuration register always reads 1.
The ADS1100 uses a switched-capacitor input stage. To
external circuitry, it looks roughly like a resistance. The
resistance value depends on the capacitor values and the
rate at which they are switched. The switching frequency is
the same as the modulator frequency; the capacitor values
depend on the PGA setting. The switching clock is generated
by the onboard clock generator, so its frequency, nominally
275kHz, is dependent on supply voltage and temperature.
In single conversion mode, the ADS1100 waits until the
ST/BSY bit in the conversion register is set to 1. When this
happens, the ADS1100 powers up and performs a single
conversion. After the conversion completes, the ADS1100
places the result in the output register, resets the ST/BSY bit
to 0 and powers down. Writing a 1 to ST/BSY while a
conversion is in progress has no effect.
The common-mode and differential input impedances are
different. For a gain setting of PGA, the differential input
impedance is typically:
2.4MΩ/PGA
The common-mode impedance is typically 8MΩ.
When switching from continuous conversion mode to single
conversion mode, the ADS1100 will complete the current
conversion, reset the ST/BSY bit to 0 and power down.
The typical value of the input impedance often cannot be
neglected. Unless the input source has a low impedance, the
ADS1100’s input impedance may affect the measurement accu-
racy. For sources with high output impedance, buffering may be
necessary. Bear in mind, however, that active buffers introduce
noise, and also introduce offset and gain errors. All of these
factors should be considered in high-accuracy applications.
RESET AND POWER-UP
When the ADS1100 powers up, it automatically performs a
reset. As part of the reset, the ADS1100 sets all of the bits
in the configuration register to their default setting.
Because the clock generator frequency drifts slightly with
temperature, the input impedances will also drift. For many
applications, this input impedance drift can be neglected, and
the typical impedance values above can be used.
The ADS1100 responds to the I2C General Call Reset
command. When the ADS1100 receives a General Call
Reset, it performs an internal reset, exactly as though it had
just been powered on.
ALIASING
I2C INTERFACE
If frequencies are input to the ADS1100 that exceed half the
data rate, aliasing will occur. To prevent aliasing, the input
signal must be bandlimited. Some signals are inherently
bandlimited. For example, a thermocouple’s output, which
has a limited rate of change, may nevertheless contain noise
and interference components. These can fold back into the
sampling band just as any other signal can.
The ADS1100 communicates through an I2C (Inter-Inte-
grated Circuit) interface. The I2C interface is a 2-wire open-
drain interface supporting multiple devices and masters on a
single bus. Devices on the I2C bus only drive the bus lines
LOW, by connecting them to ground; they never drive the
bus lines HIGH. Instead, the bus wires are pulled HIGH by
pull-up resistors, so the bus wires are HIGH when no device
is driving them LOW. This way, two devices cannot conflict;
if two devices drive the bus simultaneously, there is no driver
contention.
The ADS1100’s digital filter provides some attenuation of
high-frequency noise, but the filter’s sinc1 frequency re-
sponse cannot completely replace an anti-aliasing filter;
some external filtering may still be needed. For many appli-
cations, a simple RC filter will suffice.
ADS1100
SBAS239B
7
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