SPECIFICATIONS (CONT)
At +25°C and ±15VDC supply voltages, unless otherwise specified.
PRODUCT
3650MG, HG(1)
3650JG
3650KG
3652MG, HG(1)
3652JG
OUTPUT STAGE
Output Voltage, min
Output Current, min
Output Offset Voltage
at 25°C, max(3)
vs Temperature, max
vs Supply
±10V
±5mA
±10V
±5mA
±25mV
±900µV/°C
±10mV
±450µV/°C
±500µV/V
±10mV
±300µV/°C
±25mV
±900µV/°C
±10mV
±450µV/°C
±500µV/V
vs Time
±1mV/1000hrs
±1mV/1000hrs
Output Noise Voltage
0.05Hz to 100Hz
10Hz to 1kHz
50µVp-p
65µVrms
50µVp-p
65µVrms
Power Supply (Output Stage Only)
Voltage (“+VCC” and “–VCC”)
Current
±8V to ±18V
Quiescent
with ±5mA Output, max
±2.3mA typ, ±6mA max
±11mA
TEMPERATURE(9)
Specification
Operating
Storage
0°c to +85°C
–40°C to +100°C
–40°C to +125°C
NOTES: (1) All electrical and mechanical specifications of the 3650MG and 3652MG are identical to the 3650HG and 3652HG, respectively, except that the following
specifications apply to the 3650MG and 3652MG: (a) Isolation test voltage duration increased from 10 seconds minimum to 60 seconds minimum; (b) Input offset voltage
at 25°C, max: ±10mV; vs temperature max: ±100µV/°C; (c) Output offset voltage at 25°C, max; ±50mV; vs temperature max; ±1.8mV/°C. (2) If used as 3650, see
Installation and Operating Instructions. (3) Trimmable to zero. (4) Gain error terms specified for inputs applied through buffer amplifiers (i.e., ±1 or ±IR pins). (5) Input
stage specifications at +I and –I inputs for 3652 unless otherwise noted. (6) Maximum safe input current at either input is 10mA. (7) Continuous rating is 1/3 pulse rating.
(8) Load current is drawn from one supply lead at a time: other supply current at quiescent level. For 3652 add 0.2mA/V of positive CMV. (9) dT/dt < 1°C/minute below
0°C, and long-term storage above 100°C is not recommended. Also limit the repeated thermal cycles to be within the 0°C to +85°C temperature range.
PACKAGE INFORMATION
PIN CONFIGURATIONS
PACKAGE DRAWING
NUMBER(1)
13
14
PRODUCT
PACKAGE
3650
3650
3652
32-Pin DIP
32-Pin DIP
77
77
–V
26
20
11
+V
+
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
+VCC
Bal
23
17
–VCC
C
10
12
–
ELECTROSTATIC
DISCHARGE SENSITIVITY
C
Bal
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
15
16
32 29
8
11
13
14
3652
1.6MΩ
6
4
RO
–V
26
20
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
2
+V
A1
+
+VCC
Bal
23
17
–VCC
C
RO
2
–
3
1
A2
C
1.6MΩ
Bal
9
10 12
15
16
32 29
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
3
3650/52
BB [ BURR-BROWN CORPORATION ]
