PD035VX2
3) Typical Application Circuit (When VDD2 = +9.5V)
R15
2
1
1
1
1
1
1
1
1
2
2
2
V1
VDD2
V2
0 OHM
R1
OPEN
R2
V3
0 OHM
R3
V4
1.2K OHM
R4
2
V5
OPEN
R5
2
V6
OPEN
R6
2
V7
10K OHM
R7
2
V8
787 1% OHM
R8
1
1
1
1
1
1
1
2
V9
10K OHM
R9
2
2
2
V10
V12
V14
OPEN
R10
V11
OPEN
R11
4.7K OHM
R12
2
V13
51K OHM
R13
2
OPEN
R14
2
0 OHM
Note 5-6: When OE is connected to high “1”, the driver outputs are disabled (Gate output = VEE).
Under this condition, the operation of registers will not be affected.
Note 5-7: Select up or down shift
U/D
1
0
STVU
Hi-Z
Input
STVD
Input
Hi-Z
Shift
Down to Up
Up to Down
Note 5-8: Gate driver shift clock
Note 5-9: Gate on voltage, VGG= +17V.
Note 5-10: Gate off voltage, VEE= -10V.
Note 5-11: ILED TYP.=20mA.
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be
distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co.,
Ltd.
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